Abstract: An operational amplifier circuit reduces signal distortion in switching circuits resulting from flow of bias current through an analog switch having a resistance that changes with a common mode voltage level. The circuit includes an operational amplifier, and first, second, and third switches monolithically integrated on a same integrated circuit substrate. The first switch is connected in a feedback path of the operational amplifier between an output and an inverting input of the operational amplifier. The second and third switches each have one terminal connected to a non-inverting input of the operational amplifier and another terminal receiving a respective input signal, and operate to provide a selected input signal to the amplifier. The first switch operates in a conducting state before, during, and after any period in which any of the second and third switches is in the conducting state. The switches may be analog switches having same operational characteristics.

Abstract: In one embodiment, an A/D converter samples an analog input signal voltage by applying the input signal to a first capacitor terminal, while a second capacitor terminal is connected to ground via an NMOS sampling switch, to charge the capacitor to the input signal voltage. During an analog-to-digital conversion process, the second capacitor terminal may swing in a voltage range that extends below ground. A controller circuit provides bias voltage signals to a gate terminal and to a p-well of the NMOS sampling switch, to selectively turn the sampling switch on and off. In a first step of a multi-step sampling process, the controller very quickly discharges the gate terminal to ground to isolate a quantity of charge on the second capacitor plate. In a subsequent step of the sampling process, the controller circuit applies a negative voltage to the gate terminal and p-well to ensure that the quantity of change is substantially preserved during the ensuing analog-to-digital conversion process.