Patents by Inventor Raymond W. Thompson

Raymond W. Thompson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6396136
    Abstract: A package for a flip chip integrated circuit including an interposer with electrical interconnecting for signal, power, and ground contacts. Routing is accomplished on only two conductor layers through the use of selective planes and buses. Multiple power planes are provided on a single conductor level to support circuits having different operating voltages. A unique cavity down BGA package for a flip chip interconnected integrated circuit is provided by adhering the interposer to a thermally conductive stiffener or base, and using solder balls to attach the frame to the base and interposer. The assemblage forms a chip cavity with interconnecting vias to external BGA solder balls terminals located in the perimeter frame.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: May 28, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Navinchandra Kalidas, Masood Murtuza, Raymond W. Thompson
  • Publication number: 20010013654
    Abstract: A package 300 for a flip chip integrated 331 circuit including an interposer 303 with electrical interconnecting for signal, power, and ground contacts. Routing is accomplished on only two conductor layers through the use of selective planes and buses. Multiple power planes are provided on a single conductor level to support circuits having different operating voltages. A unique cavity down BGA package for a flip chip interconnected integrated circuit is provided by adhering the interposer to a thermally conductive stiffener or base 304, and using solder balls 308 to attach the frame to the base and interposer. The assemblage forms a chip cavity with interconnecting vias to external BGA solder balls terminals located in the perimeter frame.
    Type: Application
    Filed: December 22, 1999
    Publication date: August 16, 2001
    Inventors: NAVINCHANDRA KALIDAS, MASOOD MURTUZA, RAYMOND W THOMPSON
  • Patent number: 5976914
    Abstract: In accordance with the invention, integrated circuit dies may be packaged in a plastic package employing an area area array technology such as a conductive ball grid array, column grid array or pin grid array. One aspect of the invention is an integrated circuit package (10) which includes an electronic circuit enclosed by a plastic body (12, 14). The molded plastic body has a first major surface opposing a second major surface. The first major surface of integrated circuit (10) has a plurality of openings therein. One of a plurality of conductive pads (18) is adjacent to each one of the openings and is electrically connected to the electronic circuit. Each of a plurality of conductors (20) is electrically connected to one of the pads (18) and protrudes from one of the openings (22).
    Type: Grant
    Filed: August 26, 1997
    Date of Patent: November 2, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: John H. Abbott, Navinchandra Kalidas, Raymond W. Thompson
  • Patent number: 5777382
    Abstract: In accordance with the invention, integrated circuit dies may be packaged in a plastic package employing an area area array technology such as a conductive ball grid array, column grid array or pin grid array. One aspect of the invention is an integrated circuit package(10) which includes an electronic circuit enclosed by a plastic body (12, 14). The molded plastic body has a first major surface opposing a second major surface. The first major surface of integrated circuit (10) has a plurality of openings therein. One of a plurality of conductive pads (18) is adjacent to each one of the openings and is electrically connected to the electronic circuit. Each of a plurality of conductors (20) is electrically connected to one of the pads (18) and protrudes from one of the openings (22).
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: July 7, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: John H. Abbott, Navinchandra Kalidas, Raymond W. Thompson
  • Patent number: 4540226
    Abstract: An electronic connection socket for connecting an electronic package and including a body of nonconductive material, an electronic device fabricated upon a semiconductor substrate located upon the body. The electronic device includes several bonding pads. The socket includes a set of pins to provide interconnection to external electronic devices. The body also includes pin sockets providing interconnection to the electronic package. The pins and pin sockets of the body are also connected to the bonding pads of the electronic device. To provide the electrical interconnection between the electronic package, the electronic device located upon the semiconductor substrate in the socket body and the external circuitry connected to the body.
    Type: Grant
    Filed: January 3, 1983
    Date of Patent: September 10, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Raymond W. Thompson, Navinchandra Kalidas, John H. Abbott, David S. Laffitte