Abstract: A method includes obtaining a trigger signal directed to a component in a subset of components of an electronic circuit, and activating a clock corresponding with the subset of components of the electronic circuit for a preliminary period in response to the trigger signal. An active period is determined based on the trigger signal. The clock remains active for the active period. One of a timer or counter is initiated for the active period. A limit is defined for the one of the timer or counter. The active period is dynamically extended for a busy period after the one of the timer or counter is initiated. The clock is deactivated following the active period.

Abstract: A substring can be detected within a string of data elements through a method that includes partitioning and distributing the string of data elements to an ordered list of segments having equal lengths greater than or equal to the length of the substring. A substring match within a segment of the ordered list of segments can be detected by sequentially comparing the substring with each segment of the ordered list of segments. A carry vector that includes the substring match can be created, in response to detecting the substring match that is a partial match. It can be determined that a carry vector exists by comparing the substring with the segment of the ordered list of segments, and it can be subsequently determined that a full match exists between the carry vector and the segment of the ordered list of segments.

Abstract: The present disclosure relates to a method to execute successive dependent instructions from an instruction stream in a processor. In an embodiment, the invention relates to a method to execute successive dependent instructions from an instruction stream in a processor. The method may include identifying a first instruction and a second instruction. A given operand of a second instruction is an output of the first instruction of the pair. The first instruction is older than the second instruction. The method may include loading the operands of the first instruction and the second instruction. The method may include executing the first instruction and the second instruction.

Abstract: An instruction is provided for performing a vector string search. The instruction to be processed is obtained, with the instruction being defined to be a string search instruction to locate occurrence of a substring within a string. The instruction is processed, with the processing including searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction. Based on the searching locating a first full match of the substring within the string, a full match condition indication is returned with position of the first full match in the string, and based on the searching locating only a partial match of the substring at a termination of the string, a partial match condition indication is returned, with the position of the partial match in the string.

Abstract: A single architected instruction to perform a data reversal operation is executed. The executing includes obtaining input data and a modifier control of the instruction. The modifier control has one value of a plurality of values defined for the instruction and indicates an element size. The data reversal operation is performed on the input data. The performing includes placing, in a selected location, an element of the input data, the element having the element size indicated by the modifier control; reversing an order of the input data in the element; and repeating the placing and the reversing, based on the input data having one or more other elements to be processed. The output of the performing includes one or more elements of data that include output data in a reversed order from the input data of the corresponding one or more elements.

Abstract: A single architected instruction to perform a data reversal operation is executed. The executing includes obtaining input data and a modifier control of the instruction. The modifier control has one value of a plurality of values defined for the instruction and indicates an element size. The data reversal operation is performed on the input data. The performing includes placing an element of the input data in a selected location in reverse element order from an order of the element in the input data, the element having the element size indicated by the modifier control. The placing is repeated, based on the input data having one or more other elements to be processed. The output of the performing includes one or more elements of data in the selected location in a reversed order from the corresponding one or more elements in the input data.

Abstract: A processor unit can rapidly search a string of characters. The processor unit includes vector registers each having M vector elements, each having n bits of data for containing an encoded character. An M×M matrix of comparators within the processor unit can be used to compare elements of a first register storing a reference string and elements of a second register storing a target string. A logic gate is associated with each upper diagonal of the matrix of comparators and is configured to combine the results of comparators along the diagonal, resulting in a bit vector indicating characters of the target string that fully match the reference string and characters that partially match the reference string. The processor unit result generating logic generates, using the resulting bit vector, an indication of a substring of the target string that matches a fragment of the reference string.

Abstract: A number of non-overlapping instances of a substring occurring within a string of data elements can be determined through a method that includes partitioning and distributing the string to an ordered list of equal length segments that each have a length greater or equal to L. A substring match within a target segment of the ordered list of segments can be detected by sequentially comparing the substring with each segment of the ordered list of segments. It can be subsequently determined that the target segment contains additional data elements, and a new segment can be generated by clearing L?1 data elements following a position of the substring match in the target segment. An additional substring match can be detected by comparing the substring with the new segment.

Abstract: A number of non-overlapping instances of a substring occurring within a string of data elements can be determined through a method that includes partitioning and distributing the string to an ordered list of equal length segments that each have a length greater or equal to L. A substring match within a target segment of the ordered list of segments can be detected by sequentially comparing the substring with each segment of the ordered list of segments. It can be subsequently determined that the target segment contains additional data elements, and a new segment can be generated by clearing L-1 data elements following a position of the substring match in the target segment. An additional substring match can be detected by comparing the substring with the new segment.

Abstract: A substring can be detected within a string of data elements through a method that includes partitioning and distributing the string of data elements to an ordered list of segments having equal lengths greater than or equal to the length of the substring. A substring match within a segment of the ordered list of segments can be detected by sequentially comparing the substring with each segment of the ordered list of segments. A carry vector that includes the substring match can be created, in response to detecting the substring match that is a partial match. It can be determined that a carry vector exists by comparing the substring with the segment of the ordered list of segments, and it can be subsequently determined that a full match exists between the carry vector and the segment of the ordered list of segments.

Abstract: A processor unit can rapidly search a string of characters. The processor unit includes vector registers each having M vector elements, each having n bits of data for containing an encoded character. An M×M matrix of comparators within the processor unit can be used to compare elements of a first register storing a reference string and elements of a second register storing a target string. A logic gate is associated with each upper diagonal of the matrix of comparators and is configured to combine the results of comparators along the diagonal, resulting in a bit vector indicating characters of the target string that fully match the reference string and characters that partially match the reference string. The processor unit result generating logic generates, using the resulting bit vector, an indication of a substring of the target string that matches a fragment of the reference string.

Abstract: A processor unit can be used to rapidly search a string of characters. The processor unit can include vector registers each having M vector elements, each vector element having n bits of data for containing an encoded character. An M×M matrix of comparators within the processor unit can be used to compare elements of a first register storing a reference string and elements of a second register storing a target string. A logic gate is associated with each diagonal of the matrix of comparators, and is configured to combine the results of comparators along the diagonal, resulting in a bit vector indicating characters of the target string that fully match the reference string and characters that partially match the reference string. Correction logic within the processor unit can suppress indications of a partial match or of a full match in the bit vector.