Patents by Inventor Regis Roubadia

Regis Roubadia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10860049
    Abstract: A signal generation circuit generates first and second non-overlapping digital signals from an input pulse signal. A first digital circuit includes: a first logical OR gate receiving the second digital signal and the input pulse signal to generate a third digital signal; and a second logical OR gate receiving the input pulse signal and a delayed version of the third digital signal to generate the first digital signal. A second digital circuit includes: a first logical AND gate receiving the first digital signal and the input pulse signal to generate a fourth digital signal; and a second logical AND gate receiving the input pulse signal and the fourth digital signal to generate the second digital signal.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: December 8, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Regis Roubadia, Ludovic Girardeau
  • Patent number: 10819236
    Abstract: A driver circuit generates a drive signal having a first and second voltage state for controlling a power transistor switch coupled to a power supply node. A control circuit operates to sense a supply voltage at the power supply node and compare the sensed supply voltage to one or more voltage thresholds. In response to the comparison, the control circuit adjusts a switching slope of the drive signal from the first voltage state to the second voltage state.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: October 27, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Regis Roubadia
  • Publication number: 20200110434
    Abstract: A signal generation circuit generates first and second non-overlapping digital signals from an input pulse signal. A first digital circuit includes: a first logical OR gate receiving the second digital signal and the input pulse signal to generate a third digital signal; and a second logical OR gate receiving the input pulse signal and a delayed version of the third digital signal to generate the first digital signal. A second digital circuit includes: a first logical AND gate receiving the first digital signal and the input pulse signal to generate a fourth digital signal; and a second logical AND gate receiving the input pulse signal and the fourth digital signal to generate the second digital signal.
    Type: Application
    Filed: October 7, 2019
    Publication date: April 9, 2020
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Regis ROUBADIA, Ludovic GIRARDEAU
  • Publication number: 20200112251
    Abstract: A driver circuit generates a drive signal having a first and second voltage state for controlling a power transistor switch coupled to a power supply node. A control circuit operates to sense a supply voltage at the power supply node and compare the sensed supply voltage to one or more voltage thresholds. In response to the comparison, the control circuit adjusts a switching slope of the drive signal from the first voltage state to the second voltage state.
    Type: Application
    Filed: October 7, 2019
    Publication date: April 9, 2020
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Regis ROUBADIA
  • Patent number: 7339439
    Abstract: A multi-phase realigned voltage-controlled oscillator (MRVCO) achieves phase realignment based on charge injection in the VCO stages. The individual VCO stages provide an oscillating output signals having an asymmetric waveform with substantially different rise and fall times. This ensures that the VCO as a whole has a multiphase impulse response to the charge injection that is strictly positive or strictly negative, and substantially constant so as to be independent of the VCO phase or timing of charge injection. The MRVCO may form a component part of an implementation of a multi-phase realigned phase-locked loop (MRPLL).
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: March 4, 2008
    Assignee: Atmel Corporation
    Inventors: Regis Roubadia, Sami Ajram
  • Publication number: 20070013455
    Abstract: A multi-phase realigned voltage-controlled oscillator (MRVCO) achieves phase realignment based on charge injection in the VCO stages. The individual VCO stages provide an oscillating output signals having an asymmetric waveform with substantially different rise and fall times. This ensures that the VCO as a whole has a multiphase impulse response to the charge injection that is strictly positive or strictly negative, and substantially constant so as to be independent of the VCO phase or timing of charge injection. The MRVCO may form a component part of an implementation of a multi-phase realigned phase-locked loop (MRPLL).
    Type: Application
    Filed: July 11, 2006
    Publication date: January 18, 2007
    Applicant: ATMEL CORPORATION
    Inventors: Regis Roubadia, Sami Ajram
  • Patent number: 7126432
    Abstract: A multi-phase realigned voltage-controlled oscillator (MRVCO) achieves phase realignment based on charge injection in the VCO stages with the injection amount proportional to the instantaneous phase error between the VCO output clock and a reference clock. The MRVCO may be incorporated as part of an implementation of a multi-phase realigned phase-locked loop (MRPLL). A separate phase detector, as well as a specific realignment charge pump, may be provided in the PLL for controlling the VCO. The VCO has lower phase modulation noise, so that the PLL has very large equivalent bandwidth.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: October 24, 2006
    Assignee: Atmel Corporation
    Inventors: Regis Roubadia, Sami Ajram
  • Publication number: 20060197614
    Abstract: A multi-phase realigned voltage-controlled oscillator (MRVCO) achieves phase realignment based on charge injection in the VCO stages with the injection amount proportional to the instantaneous phase error between the VCO output clock and a reference clock. The MRVCO may be incorporated as part of an implementation of a multi-phase realigned phase-locked loop (MRPLL). A separate phase detector, as well as a specific realignment charge pump, may be provided in the PLL for controlling the VCO. The VCO has lower phase modulation noise, so that the PLL has very large equivalent bandwidth.
    Type: Application
    Filed: July 18, 2005
    Publication date: September 7, 2006
    Inventors: Regis Roubadia, Sami Ajram