Abstract: The invention relates to a memory system which is connected to a host system by means of a host bus (HB). Said system contains a memory controller (FC) having an internal memory (IR) and flash memory chips (F1 . . . Fn) which are organised in individually deletable memory blocks. Said blocks contain a plurality of writeable and readable memory sectors, and the sectors are divided into sector sections which are secured by an ECC-word. The sectors are temporarily stored in the alternating sector buffers (SB1, SB2) in order to communicate with the host system and are transmitted between the sector buffers (SB1, SB2) and the flash memory chips (F1 . . . Fn), by means of a direct-flash-access-unit (DFA), without having to be temporarily stored in the internal memory (IR) of the memory controller (FC).

Abstract: The invention relates to a memory system which is connected to a host system by means of a host bus (HB). Said system contains a memory controller (FC) having an internal memory (IR) and flash memory chips (F1 . . . Fn) which are organised in individually deletable memory blocks. Said blocks contain a plurality of writeable and readable memory sectors, and the sectors are divided into sector sections which are secured by an ECC-word. The sectors are temporarily stored in the alternating sector buffers (SB1, SB2) in order to communicate with the host system and are transmitted between the sector buffers (SB1, SB2) and the flash memory chips (F1 . . . Fn), by means of a direct-flash-access-unit (DFA), without having to be temporarily stored in the internal memory (IR) of the memory controller (FC).

Abstract: The invention relates to a method for managing memory blocks in a non-volatile memory system comprising individually erasable memory blocks which can be addressed with the aid of real memory block numbers (RBN) and can be addressed by converting the address from a logical block number (LBN) into one of the real memory block numbers, respectively, with the aid of allocator tables (LTP, PTR). The logical block number (LBN) is allocated to a physical memory block number (PBN) via a first table (LTP) while the physical memory block number (PBN) is allocated to a real memory block number (RBN) via a second table (PTR), one or several real memory blocks being addressed with the aid of one physical memory block number (PBN).

Abstract: A memory system is provided which is configured with a plurality of memory controllers (SCx), disposed in parallel on a clocked bus (B), and memory chips (Fx) associated with the respective memory controllers (SCx). The system communicates via the bus (B) with a host system (HS) by operational memory commands that use logical memory sector numbers. The inventive system is characterized by an arbitration among the memory controllers so that for any memory operation requested by the host system (HS) the memory controller affected with respect to a range of logical memory sector numbers takes over the bus for communication with the host system.

Abstract: The invention relates to a method for the management of defective memory blocks in a non-volatile memory system comprising individually erasable memory blocks (SB) that can be addressed with the aid of real memory block addresses (SBA). Said memory blocks can be addressed by means of an address conversion that uses an allocator table (ZT) to convert logical block addresses (LBA) into one of the respective memory block addresses (SBA). According to the invention, the allocator table (ZT) is sub-divided into at least one useful data area (NB), a buffer block area (BB), a defect area (DB) and a reserve area (RB). If an error occurs during the erasure process, the relevant block is replaced by a reserve block and its memory block address is written to the defect area (DB).

Abstract: The invention relates to a method for writing memory sectors in individually-deletable memory blocks (SB), comprising a number of memory sectors, whereby access to the physical sectors is achieved by means of an allocation table (ZT) for address conversion of a logical address (LA) into a physical block address (RBA) and a physical sector address (RSA) and whereby, when a sector write command is to be carried out, which relates to an already written sector, the writing takes place to an alternative memory block (AB), by means of an altered address conversion, said writing processes for sectors in the alternative memory block (AB) being carried out sequentially and the position of the relevant sector in the alternative block (AB) is stored in a sector table.

Abstract: The invention relates to a method for restoring administrative data records of a non-volatile memory that can be written in segments and erased in blocks, said records being stored in a more rapidly accessible internal volatile flag memory of an assigned memory controller. According to the invention, a reconstruction table (RKT), in which the extent of all write and erase operations is recorded as an entry, is continuously updated. This permits each administrative data record of the internal flag memory of the memory controller to be completely reconstructed during a restart after a power failure.

Abstract: The invention relates to a memory system which is configured with a plurality of memory controllers (SCx), disposed in parallel on a clocked bus (B), and memory chips (Fx) associated with the respective memory controllers (SCx). The system communicates via the bus (B) with a host system (HS) by means of operational memory commands using logical memory sector numbers. The inventive system is characterized in that for any memory operation requested by the host system (HS) the memory controller (SCx) affected with respect to a range of logical memory sector numbers (SCx) takes over the bus for communication with the host system (HS) by means of arbitration.