Patents by Inventor Remi LeReverend

Remi LeReverend has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050230758
    Abstract: A method of reducing the operating voltage level of a MOS transistor formed in a well, comprising drawing a current from the well and thereby forward biasing the well, while the well potential is allowed to vary according to inherent transistor characteristics.
    Type: Application
    Filed: April 16, 2004
    Publication date: October 20, 2005
    Inventor: Remi LeReverend
  • Patent number: 6904156
    Abstract: Squeal in a hearing aid is inhibited by a circuit that monitors battery voltage. In response to sensed low battery voltage, a cutoff circuit disables the hearing aid audio amplifier. Also in response to low battery voltage, a crowbar circuit loads the hearing aid battery with a loading circuit element.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: June 7, 2005
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: Remi LeReverend
  • Patent number: 6795006
    Abstract: An integrator with a reset mechanism comprises an integration capacitor and a replacement integration capacitor, wherein the integration capacitor is replaced with the replacement integration capacitor during a reset operation. A method of resetting an integrator comprises temporarily removing an integration capacitor and replacing the integration capacitor with a reset capacitor during a reset operation of the integrator. The method may further comprise temporarily removing the integration capacitor and replacing it with a reset capacitor multiple times during a single reset operation of the integrator.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: September 21, 2004
    Assignee: Zarlink Semiconductor AB
    Inventors: Guy Delight, Remi LeReverend
  • Patent number: 6697000
    Abstract: A delta-sigma modulator comprising a number of integration stages and having a feed-forward path from a signal input section to the signal path prior to a final integration stage, so as to reduce processing in the majority of integration stages to error processing. A delta-sigma modulator with acceptable dynamic range and incomplete settling can be designed for audio applications using a ratio of gain bandwidth product to sampling frequency in terms of a resolution of the converter. Satisfying the criteria provided by the ratio reduces the gain bandwidth requirement below that previously used as acceptable values in data converter design.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: February 24, 2004
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventors: Remi LeReverend, Guy Delight
  • Publication number: 20030169193
    Abstract: A delta-sigma modulator comprising a number of integration stages and having a feed-forward path from a signal input section to the signal path prior to a final integration stage, so as to reduce processing in the majority of integration stages to error processing. A delta-sigma modulator with acceptable dynamic range and incomplete settling can be designed for audio applications using a ratio of gain bandwidth product to sampling frequency in terms of a resolution of the converter. Satisfying the criteria provided by the ratio reduces the gain bandwidth requirement below that previously used as acceptable values in data converter design.
    Type: Application
    Filed: August 2, 2002
    Publication date: September 11, 2003
    Inventors: Remi LeReverend, Guy Delight