Patents by Inventor Ren Lee
Ren Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12002854Abstract: A semiconductor device having an improved source/drain region profile and a method for forming the same are disclosed. In an embodiment, a method includes etching one or more semiconductor fins to form one or more recesses; and forming a source/drain region in the one ore more recesses, the forming the source/drain region including epitaxially growing a first semiconductor material in the one or more recesses at a temperature of 600° C. to 800° C., the first semiconductor material including doped silicon germanium; and conformally depositing a second semiconductor material over the first semiconductor material at a temperature of 300° C. to 600° C., the second semiconductor material including doped silicon germanium and having a different composition than the first semiconductor material.Type: GrantFiled: November 8, 2021Date of Patent: June 4, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Heng-Wen Ting, Kei-Wei Chen, Chii-Horng Li, Pei-Ren Jeng, Hsueh-Chang Sung, Yen-Ru Lee, Chun-An Lin
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Publication number: 20240177414Abstract: A three-dimensional (3D) scene is generated from non-aligned generic camera priors by producing a tri-plane representation for an input scene received in random latent code, obtaining a camera posterior including posterior parameters representing color and density data from the random latent code and from generic camera priors without alignment assumptions, and volumetrically rendering an image of the input scene from the color and density data to provide a scene having pixel colors and depth values from an arbitrary camera viewpoint. A depth adaptor processes depth values to generate an adapted depth map that bridges domains of rendered and estimated depth maps for the image of the input scene. The adapted depth map, color data, and scene geometry information from an external dataset are provided to a discriminator for selection of a 3D representation of the input scene.Type: ApplicationFiled: November 30, 2022Publication date: May 30, 2024Inventors: Hsin-Ying Lee, Jian Ren, Aliaksandr Siarohin, Ivan Skorokhodov, Sergey Tulyakov, Yinghao Xu
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Publication number: 20240151304Abstract: For a manual gearshift control of conventional vehicle transmission, a vehicle gearshift automatic control device including a first actuator module, a second actuator module and an electronic control unit, is provided in an add-on manner to retrofit the vehicle transmission with both automatic and manual gearshift functions. In an automatic gearshift mode, the electronic control unit executes the vehicle gearshift automatic control method and receives an automatic gearshift command to drive the first actuator module to push a shift lever to implement a lateral shift selection, or to drive the second actuator module to spin a park lever to implement a longitudinal gearshift. For vehicle security, whenever a vehicle gearshift automatic control device failure or a manual gearshift intervention is detected in the automatic gearshift mode, the electronic control unit shuts off the automatic gearshift mode and switches to a manual gearshift mode to perform the manual gearshift function.Type: ApplicationFiled: February 17, 2023Publication date: May 9, 2024Inventors: Shao-Yu Lee, Zeng-Lung Huang, Bing-Ren Chen, Jia-Cheng Ke
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Publication number: 20240120200Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises receiving a structure including a substrate and a first hard mask over the substrate, the first hard mask having at least two separate portions; forming spacers along sidewalls of the at least two portions of the first hard mask with a space between the spacers; forming a second hard mask in the space; forming a first cut in the at least two portions of the first hard mask; forming a second cut in the second hard mask; and depositing a cut hard mask in the first cut and the second cut.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Hsi-Wen Tien, Wei-Hao Liao, Pin-Ren Dai, Chih Wei Lu, Chung-Ju Lee
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Publication number: 20240112401Abstract: A system and method are described for generating 3D garments from two-dimensional (2D) scribble images drawn by users. The system includes a conditional 2D generator, a conditional 3D generator, and two intermediate media including dimension-coupling color-density pairs and flat point clouds that bridge the gap between dimensions. Given a scribble image, the 2D generator synthesizes dimension-coupling color-density pairs including the RGB projection and density map from the front and rear views of the scribble image. A density-aware sampling algorithm converts the 2D dimension-coupling color-density pairs into a 3D flat point cloud representation, where the depth information is ignored. The 3D generator predicts the depth information from the flat point cloud. Dynamic variations per garment due to deformations resulting from a wearer's pose as well as irregular wrinkles and folds may be bypassed by taking advantage of 2D generative models to bridge the dimension gap in a non-parametric way.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Panagiotis Achlioptas, Menglei Chai, Hsin-Ying Lee, Kyle Olszewski, Jian Ren, Sergey Tulyakov
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Publication number: 20240096958Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a fin on a substrate. A gate structure is over the fin. A source/drain is in the fin proximate the gate structure. The source/drain includes a bottom layer, a supportive layer over the bottom layer, and a top layer over the supportive layer. The supportive layer has a different property than the bottom layer and the top layer, such as a different material, a different natural lattice constant, a different dopant concentration, and/or a different alloy percent content.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Jung-Chi Tai, Chii-Horng Li, Pei-Ren Jeng, Yen-Ru Lee, Yan-Ting Lin, Chih-Yun Chin
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Patent number: 11915943Abstract: A semiconductor structure includes a conductive feature disposed over a semiconductor substrate, a via disposed in a first interlayer dielectric (ILD) layer over the conductive feature, and a metal-containing etch-stop layer (ESL) disposed on the via, where the metal-containing ESL includes a first metal and is resistant to etching by a fluorine-containing etchant. The semiconductor structure further includes a conductive line disposed over the metal-containing ESL, where the conductive line includes a second metal different from the first metal and is etchable by the fluorine-containing etchant, and where the via is configured to interconnect the conductive line to the conductive feature. Furthermore, the semiconductor structure includes a second ILD layer disposed over the first ILD layer.Type: GrantFiled: October 25, 2021Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wei-Hao Liao, Hsi-Wen Tien, Chih Wei Lu, Pin-Ren Dai, Chung-Ju Lee
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Patent number: 11619561Abstract: A fan inspection jig includes a jig assembly having multiple spring abutment pillars for holding two sides of a fan (or a series fan) to make the fan or the series fan positioned in a suspending position. A vibration sensor is disposed in at least one of the spring abutment pillars of two sides of the fan for measuring a vibration signal of the fan in operation.Type: GrantFiled: September 27, 2021Date of Patent: April 4, 2023Assignee: Asia Vital Components Co., Ltd.Inventors: Jyh-Ren Lee, Yi-Hong Liao
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Publication number: 20230100456Abstract: A fan inspection jig includes a jig assembly having multiple spring abutment pillars for holding two sides of a fan (or a series fan) to make the fan or the series fan positioned in a suspending position. A vibration sensor is disposed in at least one of the spring abutment pillars of two sides of the fan for measuring a vibration signal of the fan in operation.Type: ApplicationFiled: September 27, 2021Publication date: March 30, 2023Inventors: Jyh-Ren Lee, Yi-Hong Liao
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Patent number: 11515307Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.Type: GrantFiled: June 4, 2020Date of Patent: November 29, 2022Assignees: National Applied Research Laboratories, EPISTAR CorporationInventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
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Patent number: 11189754Abstract: A semiconductor substrate is provided in the present disclosure. The semiconductor substrate includes a first semiconductor layer and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer has a first lattice constant (L1) and the second semiconductor layer has a second lattice constant (L2). A ratio of a difference (L2-L1) between the second lattice constant (L2) and the first lattice constant (L1) to the first lattice constant (L1) is greater than 0.036.Type: GrantFiled: June 25, 2019Date of Patent: November 30, 2021Assignee: Epistar CorporationInventors: Meng-Yang Chen, Rong-Ren Lee
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Publication number: 20200303377Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.Type: ApplicationFiled: June 4, 2020Publication date: September 24, 2020Inventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
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Patent number: 10749077Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.Type: GrantFiled: December 20, 2018Date of Patent: August 18, 2020Assignee: EPISTAR CORPORATIONInventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
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Patent number: 10727231Abstract: A heterogeneously integrated semiconductor device includes a substrate comprising a first material; a recess formed within the substrate and having a bottom portion with a first width, a top portion with a second width and a middle portion with a third width larger than the first width and the second width; and a first semiconductor layer filled in the bottom portion and including a second material different from the first material.Type: GrantFiled: October 12, 2018Date of Patent: July 28, 2020Assignees: National Applied Research Laboratories, EPISTAR CorporationInventors: Shih-Pang Chang, Guang-Li Luo, Szu-Hung Chen, Wen-Kuan Yeh, Jen-Inn Chyi, Meng-Yang Chen, Rong-Ren Lee, Shih-Chang Lee, Ta-Cheng Hsu
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Patent number: 10600938Abstract: A light-emitting device includes: a light-emitting stack including a first active layer emitting a first light having a first peak wavelength; a diode emitting a second light having a second peak wavelength between 800 nm and 1900 nm; and a tunneling junction between the diode and the light-emitting stack, wherein the tunneling junction includes a first tunneling layer and a second tunneling layer on the first tunneling layer, the first tunneling layer has a band gap and a thickness of the first tunneling layer is greater than a thickness of the second tunneling layer.Type: GrantFiled: May 18, 2018Date of Patent: March 24, 2020Assignee: EPISTAR CORPORATIONInventors: Chih-Chiang Lu, Yi-Chieh Lin, Rong-Ren Lee, Yu-Ren Peng, Ming-Siang Huang, Ming-Ta Chin, Yi-Ching Lee
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Patent number: 10580937Abstract: An optoelectronic device includes a semiconductor structure having a first side and a second side opposite to the first side, a first pad at the first side, a first finger connected to the electrode pad and having a first width, an insulating layer at the second side and comprising a first part under the first finger, the first part having a bottom surface with a second width larger than the first width and a side surface inclined to the bottom surface, and a contact layer covering the bottom surface and the side surface.Type: GrantFiled: December 20, 2018Date of Patent: March 3, 2020Assignee: EPISTAR CORPORATIONInventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
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Patent number: 10566498Abstract: A semiconductor light-emitting device comprises an epitaxial structure comprising an main light-extraction surface, a lower surface opposite to the main light-extraction surface, a side surface connecting the main light-extraction surface and the lower surface, a first portion and a second portion between the main light-extraction surface and the first portion, wherein a concentration of a doping material in the second portion is higher than that of the doping material in the first portion and, in a cross-sectional view, the second portion comprises a first width near the main light-extraction surface and second width near the lower surface, and the first width is smaller than the second width.Type: GrantFiled: July 24, 2018Date of Patent: February 18, 2020Assignee: EPISTAR CORPORATIONInventors: Hsin-Chih Chiu, Shih-I Chen, You-Hsien Chang, Hao-Min Ku, Ching-Yuan Tsai, Kuan-Chih Kuo, Chih-Hung Hsiao, Rong-Ren Lee
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Publication number: 20190393380Abstract: A semiconductor substrate is provided in the present disclosure. The semiconductor substrate includes a first semiconductor layer and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer has a first lattice constant (L1) and the second semiconductor layer has a second lattice constant (L2). A ratio of a difference (L2-L1) between the second lattice constant (L2) and the first lattice constant (L1) to the first lattice constant (L1) is greater than 0.036.Type: ApplicationFiled: June 25, 2019Publication date: December 26, 2019Inventors: Meng-Yang CHEN, Rong-Ren LEE
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Patent number: 10367118Abstract: A light-emitting diode, comprises an active layer for emitting a light ray; an upper semiconductor stack on the active layer, wherein the upper semiconductor stack comprises a window layer; a reflector; and a lower semiconductor stack between the active layer and the reflector; wherein the thickness of the window layer is small than or equal to 3 ?m, and the thickness of the lower semiconductor stack is small than or equal to 1 ?m.Type: GrantFiled: September 15, 2016Date of Patent: July 30, 2019Assignee: EPISTAR CORPORATIONInventors: Yu-Ren Peng, Tzu-Chieh Hsu, Shih-I Chen, Rong-Ren Lee, Hsin-Chan Chung, Wen-Luh Liao, Yi-Chieh Lin
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Publication number: 20190148599Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.Type: ApplicationFiled: December 20, 2018Publication date: May 16, 2019Inventors: Chun-Yu LIN, Yung-Fu CHANG, Rong-Ren LEE, Kuo-Feng HUANG, Cheng-Long YEH, Yi-Ching LEE, Ming-Siang HUANG, Ming-Tzung LIOU