Patents by Inventor Renu W. Dave

Renu W. Dave has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140021471
    Abstract: An MRAM bit (10) includes a free magnetic region (15), a fixed magnetic region (17) comprising an antiferromagnetic material, and a tunneling barrier (16) comprising a dielectric layer positioned between the free magnetic region (15) and the fixed magnetic region (17). The MRAM bit (10) avoids a pinning layer by comprising a fixed magnetic region exhibiting a well-defined high Hflop using a combination of high Hk (uniaxial anisotropy), high Hsat (saturation field), and ideal soft magnetic properties exhibiting well-defined easy and hard axes.
    Type: Application
    Filed: June 24, 2013
    Publication date: January 23, 2014
    Inventors: Srinivas V. Pietambaram, Bengt J. Akerman, Renu W. Dave, Jason A. Janesky, Nicholas D. Rizzo, Jon M. Slaughter
  • Patent number: 8497538
    Abstract: An MRAM bit (10) includes a free magnetic region (15), a fixed magnetic region (17) comprising an antiferromagnetic material, and a tunneling barrier (16) comprising a dielectric layer positioned between the free magnetic region (15) and the fixed magnetic region (17). The MRAM bit (10) avoids a pinning layer by comprising a fixed magnetic region exhibiting a well-defined high Hflop using a combination of high Hk (uniaxial anisotropy), high Hsat (saturation field), and ideal soft magnetic properties exhibiting well-defined easy and hard axes.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: July 30, 2013
    Assignee: Everspin Technologies, Inc.
    Inventors: Srinivas V. Pietambaram, Bengt J. Akerman, Renu W. Dave, Jason A. Janesky, Nicholas D. Rizzo, Jon M. Slaughter
  • Patent number: 8236578
    Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: August 7, 2012
    Assignee: Everspin Technologies, Inc.
    Inventors: Phillip G. Mather, Sanjeev Aggarwal, Brian R. Butcher, Renu W. Dave, Frederick B. Mancoff, Nicholas D. Rizzo
  • Publication number: 20120122247
    Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.
    Type: Application
    Filed: January 25, 2012
    Publication date: May 17, 2012
    Applicant: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Phillip G. Mather, Sanjeev Aggarwal, Brian R. Butcher, Renu W. Dave, Frederick B. Mancoff, Nicholas D. Rizzo
  • Patent number: 8119424
    Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: February 21, 2012
    Assignee: Everspin Technologies, Inc.
    Inventors: Phillip G. Mather, Sanjeev Aggarwal, Brian R. Butcher, Renu W. Dave, Frederick B. Mancoff, Nicholas D. Rizzo
  • Patent number: 7888756
    Abstract: A magnetic tunnel junction (MTJ) structure is of the type having a tunnel barrier positioned between a fixed ferromagnetic layer and a free ferromagnetic layer, the tunnel barrier includes a first barrier layer contacting either the fixed ferromagnetic layer or the free ferromagnetic layer. The first barrier layer transmits a high spin polarization and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides. The second barrier layer, which contacts the first barrier layer, has a low barrier height and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: February 15, 2011
    Assignee: Everspin Technologies, Inc.
    Inventors: Phillip Glenn Mather, Renu W. Dave, Frederick B. Mancoff
  • Patent number: 7684161
    Abstract: A synthetic antiferromagnet (SAF) structure includes a first ferromagnetic layer, a first insertion layer, a coupling layer, a second insertion layer, and a second ferromagnetic layer. The insertion layers comprise materials selected such that SAF exhibits reduced temperature dependence of antiferromagnetic coupling strength. The insertion layers may include CoFe or CoFeX alloys. The thickness of the insertion layers is selected such that they do not increase the uniaxial anisotropy or deteriorate any other properties.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: March 23, 2010
    Assignee: Everspin Technologies, Inc.
    Inventors: Srinivas V. Pietambaram, Renu W. Dave, Jon M. Slaughter, JiJun Sun
  • Patent number: 7572645
    Abstract: Methods and apparatus are provided for magnetic tunnel junctions (MTJs) (10, 50) employing synthetic antiferromagnet (SAF) free layers (14, 14?). The MTJ (10, 50) comprises a pinned ferromagnetic (FM) layer (32, 18), the SAF (14) and a tunneling barrier (16) therebetween. The SAF (14) has a first higher spin polarization FM layer (30) proximate the tunneling barrier (16) and a second FM layer (26) desirably separated from the first FM layer (30) by a coupling layer (28), with magnetostriction adapted to compensate the magnetostriction of the first FM layer (30). Such compensation reduces the net magnetostriction of the SAF (14) to near zero even with high spin polarization proximate the tunneling barrier (16). Higher magnetoresistance ratios (MRs) are obtained without adverse affect on other MTJ (10, 50) properties. NiFe combinations are desirable for the first (30) and second (26) free FM layers, with more Fe in the first (30) free layer and less Fe in the second (26) free layer.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: August 11, 2009
    Assignee: Everspin Technologies, Inc.
    Inventors: Jijun Sun, Renu W. Dave, Jason A. Janesky, Jon M. Slaughter
  • Publication number: 20090085058
    Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Phillip G. Mather, Sanjeev Aggarwal, Brian R. Butcher, Renu W. Dave, Frederick B. Mancoff, Nicholas D. Rizzo
  • Publication number: 20090046397
    Abstract: A synthetic antiferromagnet (SAF) structure includes a bottom ferromagnetic layer, a coupling layer formed over the bottom ferromagnetic layer, and a top ferromagnetic layer formed over the coupling layer. One of the top and bottom ferromagnetic layers comprises an amorphous alloy characterized by (Co100-aFea)100-zBz, where a is less than approximately 10 atomic percent, and z is greater than approximately 20 atomic percent. In general, a magnetic device includes at least one magnetic layer comprising an amorphous CoFeB alloy characterized by (Co100-aFea)100-zBz, where a is less than approximately 10 atomic percent, and z is greater than approximately 20 atomic percent.
    Type: Application
    Filed: August 15, 2007
    Publication date: February 19, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Jijun Sun, Renu W. Dave, Jon M. Slaughter
  • Publication number: 20080232002
    Abstract: A magnetic tunnel junction (MTJ) structure is of the type having a tunnel barrier positioned between a fixed ferromagnetic layer and a free ferromagnetic layer, the tunnel barrier includes a first barrier layer contacting either the fixed ferromagnetic layer or the free ferromagnetic layer. The first barrier layer transmits a high spin polarization and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides. The second barrier layer, which contacts the first barrier layer, has a low barrier height and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides.
    Type: Application
    Filed: March 22, 2007
    Publication date: September 25, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Phillip G. Mather, Renu W. Dave, Frederick B. Mancoff
  • Publication number: 20080113220
    Abstract: Methods and apparatus are provided for magnetic tunnel junctions (MTJs) (10, 50) employing synthetic antiferromagnet (SAF) free layers (14, 14?). The MTJ (10, 50) comprises a pinned ferromagnetic (FM) layer (32, 18), the SAF (14) and a tunneling barrier (16) therebetween. The SAF (14) has a first higher spin polarization FM layer (30) proximate the tunneling barrier (16) and a second FM layer (26) desirably separated from the first FM layer (30) by a coupling layer (28), with magnetostriction adapted to compensate the magnetostriction of the first FM layer (30). Such compensation reduces the net magnetostriction of the SAF (14) to near zero even with high spin polarization proximate the tunneling barrier (16). Higher magnetoresistance ratios (MRs) are obtained without adverse affect on other MTJ (10, 50) properties. NiFe combinations are desirable for the first (30) and second (26) free FM layers, with more Fe in the first (30) free layer and less Fe in the second (26) free layer.
    Type: Application
    Filed: November 15, 2006
    Publication date: May 15, 2008
    Inventors: Jijun Sun, Renu W. Dave, Jason A. Janesky, Jon M. Slaughter
  • Patent number: 7329935
    Abstract: Low power magnetoresistive random access memory elements and methods for fabricating the same are provided. In one embodiment, a magnetoresistive random access device has an array of memory elements. Each element comprises a fixed magnetic portion, a tunnel barrier portion, and a free SAF structure. The array has a finite magnetic field programming window Hwin represented by the equation Hwin?(Hsat??sat)?(Hsw+?sw), where Hsw is a mean switching field for the array, Hsat is a mean saturation field for the array, and Hsw for each memory element is represented by the equation HSW??{square root over (HkHSAT)}, where Hk represents a total anisotropy and HSAT represents an anti-ferromagnetic coupling saturation field for the free SAF structure of each memory element. N is an integer greater than or equal to 1. Hk, HSAT, and N for each memory element are selected such that the array requires current to operate that is below a predetermined current value.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: February 12, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nicholas D. Rizzo, Renu W. Dave, Bradley N. Engel, Jason A. Janesky, JiJun Sun
  • Publication number: 20070278547
    Abstract: An MRAM bit (10) includes a free magnetic region (15), a fixed magnetic region (17) comprising an antiferromagnetic material, and a tunneling barrier (16) comprising a dielectric layer positioned between the free magnetic region (15) and the fixed magnetic region (17). The MRAM bit (10) avoids a pinning layer by comprising a fixed magnetic region exhibiting a well-defined high Hflop using a combination of high Hk (uniaxial anisotropy), high Hsat (saturation field), and ideal soft magnetic properties exhibiting well-defined easy and hard axes.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 6, 2007
    Inventors: Srinivas V. Pietambaram, Bengt J. Akerman, Renu W. Dave, Jason A. Janesky, Nicholas D. Rizzo, Jon M. Slaughter
  • Patent number: 7226796
    Abstract: A magnetic tunnel junction (MTJ), which is useful in magnetoresistive random access memories (MRAMs), has a free layer which is a synthetic antiferromagnet (SAF) structure. This SAF is composed of two ferromagnetic layers that are separated by a coupling layer. The coupling layer has a base material that is non-magnetic and also other materials that improve thermal endurance, control of the coupling strength of the SAF, and magnetoresistance ratio (MR). The preferred base material is ruthenium and the preferred other material is tantalum. Furthering these benefits, cobalt-iron is added at the interface between the tantalum and one of the ferromagnetic layers. Also the coupling layer can have even more layers and the materials used can vary. Also the coupling layer itself can be an alloy.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: June 5, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Srinivas V. Pietambaram, Renu W. Dave, Jon M. Slaughter, Jijun Sun
  • Patent number: 7129098
    Abstract: Low power magnetoresistive random access memory elements and methods for fabricating the same are provided. In one embodiment, a magnetoresistive random access device has an array of memory elements. Each element comprises a fixed magnetic portion, a tunnel barrier portion, and a free SAF structure. The array has a finite magnetic field programming window Hwin represented by the equation Hwin?(Hsat?N?sat)?(Hsw+N?sw), where Hsw is a mean switching field for the array, Hsat is a mean saturation field for the array, and Hsw for each memory element is represented by the equation HSW??{square root over (HkHSAT)}, where Hk represents a total anisotropy and HSAT represents an anti-ferromagnetic coupling saturation field for the free SAF structure of each memory element. N is an integer greater than or equal to 1. Hk, HSAT, and N for each memory element are selected such that the array requires current to operate that is below a predetermined current value.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: October 31, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nicholas D. Rizzo, Renu W. Dave, Bradley N. Engel, Jason A. Janesky, JiJun Sun
  • Patent number: 7098495
    Abstract: Magnetic tunnel junction (“MTJ”) element structures and methods for fabricating MTJ element structures are provided. An MTJ element structure may comprise a crystalline pinned layer, an amorphous fixed layer, and a coupling layer disposed between the crystalline pinned layer and the amorphous fixed layer. The amorphous fixed layer is antiferromagnetically coupled to the crystalline pinned layer. The MTJ element further comprises a free layer and a tunnel barrier layer disposed between the amorphous fixed layer and the free layer. Another MTJ element structure may comprise a pinned layer, a fixed layer and a non-magnetic coupling layer disposed therebetween. A tunnel barrier layer is disposed between the fixed layer and a free layer. An interface layer is disposed adjacent the tunnel barrier layer and a layer of amorphous material. The first interface layer comprises a material having a spin polarization that is higher than that of the amorphous material.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: August 29, 2006
    Assignee: Freescale Semiconducor, Inc.
    Inventors: JiJun Sun, Renu W. Dave, Jon M. Slaughter, Johan Akerman
  • Patent number: 7067331
    Abstract: An amorphous layer of a cobalt iron-based (CoFe-based) magnetic alloy suitable for use in magnetoelectronic devices is disclosed. In the most preferred embodiments of the present invention, at least one amorphous layer is provided in an MTJ stack to increase the smoothness of the various layers in the MTJ stack while also enhancing the magnetic performance of the resulting device. Additionally, the alloys of the present invention are also useful in cladding applications to provide electrical flux containment for signal lines in magnetoelectronic devices and as a material for fabricating write heads.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: June 27, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jon M. Slaughter, Renu W. Dave, Srinivas V. Pietambaram
  • Patent number: 6946697
    Abstract: A magnetic tunnel junction (MTJ), which is useful in magnetoresistive random access memories (MRAMs), has a free layer which is a synthetic antiferromagnet (SAF) structure. This SAF is composed of two ferromagnetic layers that are separated by a coupling layer. The coupling layer has a base material that is non-magnetic and also other materials that improve thermal endurance, control of the coupling strength of the SAF, and magnetoresistance ratio (MR). The preferred base material is ruthenium and the preferred other material is tantalum. Furthering these benefits, cobalt-iron is added at the interface between the tantalum and one of the ferromagnetic layers. Also the coupling layer can have even more layers and the materials used can vary. Also the coupling layer itself can be an alloy.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: September 20, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Srinivas V. Pietambaram, Renu W. Dave, Jon M. Slaughter, Jijun Sun
  • Patent number: 6831312
    Abstract: An amorphous layer of a cobalt iron-based (CoFe-based) magnetic alloy suitable for use in magnetoelectronic devices is disclosed. In the most preferred embodiments of the present invention, at least one amorphous layer is provided in an MTJ stack to increase the smoothness of the various layers in the MTJ stack while also enhancing the magnetic performance of the resulting device. Additionally, the alloys of the present invention are also useful in cladding applications to provide electrical flux containment for signal lines in magnetoelectronic devices and as a material for fabricating write heads.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: December 14, 2004
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jon M. Slaughter, Renu W. Dave, Srinivas V. Pietambaram