Patents by Inventor Ret-Bean Lee

Ret-Bean Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Time acquisition system with dual-loop for independent frequency phase lock
    Patent number: 5446416
    Abstract: A time acquisition system is disclosed with dual independent frequency and phase lock loops, each containing a dedicated voltage controlled oscillator (VCO). The frequency lock loop (FLL) outputs a frequency bias signal, used for coarse frequency lock-up, only when the difference frequency between the input signal and the FLL VCO is outside a predetermined frequency band -.DELTA..omega..sub.L to .DELTA..omega..sub.L. Significantly, the frequency bias signal is equal to zero when the difference frequency between the input signal and the FLL VCO is inside the frequency band -.DELTA..omega..sub.L to .DELTA..omega..sub.L. The phase lock loop (PLL) provides a phase bias signal, used for fine tuning lock-up, when the difference frequency between the input signal and the PLL VCO is inside the predetermined frequency band -.DELTA..omega..sub.L to .DELTA..omega..sub.L. Therefore, there is no interaction between loops during the final phase tuning lock-up.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: August 29, 1995
    Assignee: Industrial Technology Research Institute
    Inventors: Jizoo Lin, Hsan-Fong Lin, Ret-Bean Lee, Chorng-Kuang Wang