Abstract: A method of testing memory devices includes issuing a command to a Flash memory device, simultaneously monitoring at least one data bit of each Flash memory device for a ready indication, and then verifying the command was performed successfully in each Flash memory device. The command can be an erase command, a write command, or the like. The simultaneous monitoring can be performed by simultaneously asserting signals on output enable nodes of the memory devices, and monitoring bidirectional tester channels dedicated for this purpose. A test fixture includes memory device receptacles, a tester interface, and conductive paths to couple the tester interface to the memory device receptacles. The conductive paths include paths for dedicated bidirectional tester channels and shared bidirectional tester channels.

Abstract: A method of testing memory devices includes issuing a command to a Flash memory device, simultaneously monitoring at least one data bit of each Flash memory device for a ready indication, and then verifying the command was performed successfully in each Flash memory device. The command can be an erase command, a write command, or the like. The simultaneous monitoring can be performed by simultaneously asserting signals on output enable nodes of the memory devices, and monitoring bidirectional tester channels dedicated for this purpose. A test fixture includes memory device receptacles, a tester interface, and conductive paths to couple the tester interface to the memory device receptacles. The conductive paths include paths for dedicated bidirectional tester channels and shared bidirectional tester channels.

Abstract: Output driver stages and operation modes for selectively disabling device outputs are adapted for use in integrated circuit devices and in the testing of such integrated circuit devices. A device output is disabled by disabling its associated output driver. A first control signal is generated that is indicative of whether an output driver should be responsive to a second control signal or disabled regardless of the second control signal. The first control signal may be provided directly to one or more output drivers. Alternatively, the first control signal may be combined with the second control signal. The first control signal may be common to all coupled output drivers or a separate first control signal may be provided for each output driver. Selective disabling of output drivers can be used to force a device time-out during testing. Selective disabling of output drivers can also be used to reduce device power requirements.