Patents by Inventor Reza Argenty Pagaila

Reza Argenty Pagaila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10043733
    Abstract: A method of manufacture of an integrated circuit packaging system includes providing an integrated circuit having an active side and a non-active side; forming an indent, having a flange and an indent side, from a peripheral region of the active side; and forming a conformal interconnect, having an elevated segment, a slope segment, and a flange segment, over the indent.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 7, 2018
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Patent number: 9431316
    Abstract: A semiconductor device has semiconductor die mounted to a temporary carrier. An encapsulant is deposited over the die and carrier. A channel is formed in a back surface of the die, either while in wafer form or after mounting to the carrier. The channel corresponds to a specific heat generating area of the die. The channel can be straight or curved or crossing pattern. The carrier is removed. An interconnect structure is formed over the encapsulant and die. The semiconductor die are singulated through the encapsulant. A TIM and heat sink are formed over the channel and encapsulant. Alternatively, a conformal plating layer can be formed over the channel and encapsulant. A conductive via can be formed through the encapsulant, and TSV formed through the die. The die with channels can be mounted over a second semiconductor die which is mounted to the interconnect structure.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: August 30, 2016
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventor: Reza Argenty Pagaila
  • Patent number: 9293385
    Abstract: An integrated circuit package system includes: providing an internal device; encapsulating the internal device with an encapsulation having an outer surface; and forming a redistribution line having connection points on the outer surface of the encapsulation.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: March 22, 2016
    Assignee: STATS ChipPAC Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Dioscoro A. Merilo
  • Patent number: 9093364
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching an integrated circuit to the substrate; attaching a vertical interconnect over the substrate; forming an encapsulation on the substrate and covering the vertical interconnect; and forming a rounded cavity, having a curved side, in the encapsulation with the vertical interconnect exposed in the rounded cavity.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: July 28, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventor: Reza Argenty Pagaila
  • Patent number: 9059011
    Abstract: An integrated circuit packaging system includes: providing a substrate; mounting an integrated circuit above the substrate; connecting an interposer to the integrated circuit with a wire-in-film adhesive; connecting an exposed interconnect having an upper surface to the substrate; and encapsulating the integrated circuit with an encapsulation.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: June 16, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Patent number: 9029205
    Abstract: A method for manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a planar interconnect, over a carrier with the planar interconnect at a non-active side of the integrated circuit and an active side of the integrated circuit facing the carrier; connecting the integrated circuit and the carrier; connecting the planar interconnect and the carrier; and forming an encapsulation over the integrated circuit, the carrier, and the planar interconnect.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: May 12, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Heap Hoe Kuan
  • Patent number: 9030006
    Abstract: An integrated circuit package system includes: providing an integrated circuit substrate; forming an internal stacking module coupled to the integrated circuit substrate including: forming a flexible substrate, coupling a stacking module integrated circuit to the flexible substrate, and bending a flexible extension over the stacking module integrated circuit; and molding a package body on the integrated circuit substrate and the internal stacking module.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: May 12, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Seng Guan Chow, Heap Hoe Kuan, Reza Argenty Pagaila
  • Patent number: 8969136
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a lead frame having a die attach paddle pad and a peripheral lead pad with an inner lead pad between the die attach paddle pad and the peripheral lead pad; forming a component side of the lead frame for exposing an upper portion of a peripheral lead under the peripheral lead pad; forming an encapsulation on the lead frame and the upper portion of the peripheral lead; exposing the peripheral lead pad; depositing a conductive shielding layer on the encapsulation connected to the peripheral lead pad; and forming a mounting side of the lead frame for forming a lower portion of the peripheral lead over a peripheral lead contact pad.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: March 3, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventor: Reza Argenty Pagaila
  • Patent number: 8962393
    Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting a device mounting structure over a bottom substrate; mounting a heat spreader having an opening formed by a single integral structure with a dam and a flange, the dam having a dam height greater than a flange height of the flange; and forming a package encapsulation over the device mounting structure and the bottom substrate with the device mounting structure exposed within the opening.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 24, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua
  • Patent number: 8861221
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a first integrated circuit over the substrate; forming an encapsulant around the first integrated circuit and over the substrate; and forming a shield structure within and over the encapsulant while simultaneously forming a vertical interconnect structure.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: October 14, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventor: Reza Argenty Pagaila
  • Patent number: 8815650
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting an integrated circuit above the substrate with an interconnect directly connecting between the substrate and the integrated circuit; and forming an under-fill between the integrated circuit and the substrate having a cast side.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: August 26, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventor: Reza Argenty Pagaila
  • Patent number: 8642382
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a mountable assembly includes: forming an integrated circuit device having a non-horizontal device side, an active device side, and a passive device side, providing a first integrated circuit die having an active side, a passive side, and an internal interconnect on the active side, applying a die attach adhesive on the passive side, attaching the passive side to the passive device side with the die attach adhesive, and applying an underfill on the passive device side and the internal interconnect, the underfill having a non-horizontal underfill side coplanar with the non-horizontal device side; and mounting on a substrate the mountable assembly.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: February 4, 2014
    Assignee: Stats Chippac Ltd.
    Inventors: Heap Hoe Kuan, Reza Argenty Pagaila, Rui Huang
  • Patent number: 8633059
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base carrier; providing a first integrated circuit having a first integrated circuit inactive side and a first integrated circuit active side; coupling a second integrated circuit, having a second integrated circuit inactive side and a second integrated circuit active side, to the first integrated circuit in an active-to-active configuration; attaching the first integrated circuit over the base carrier; attaching a redistribution structure over the first integrated circuit; and forming a base encapsulation over the redistribution structure, the base encapsulation having a recess partially exposing the redistribution structure.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: January 21, 2014
    Assignee: Stats Chippac Ltd.
    Inventors: Byung Tai Do, Reza Argenty Pagaila
  • Patent number: 8531043
    Abstract: An integrated circuit package system includes: providing a substrate; mounting a first package above the substrate, the first package having a mold cavity exposing an exposed portion on a first integrated circuit from a first package encapsulation; mounting a second package above the first package and attached to the exposed portion of the first integrated circuit; mounting a structure above the second package and connected to the substrate around the first package; and encapsulating the first package and the second package with an outer encapsulation having a completely planar top or a planar top co-planar to a top surface of the structure.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: September 10, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Jong-Woo Ha, Reza Argenty Pagaila
  • Patent number: 8519518
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a package paddle; forming a lead adjacent the package paddle, the lead having a hole in a lead body top side and a lead ridge protruding from a lead non-horizontal side; mounting an integrated circuit over the package paddle; connecting an electrical connector to the lead and the integrated circuit; and forming a fill layer within the hole.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: August 27, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Byung Tai Do, Reza Argenty Pagaila, Linda Pei Ee Chua, Arnel Senosa Trasporto
  • Patent number: 8482115
    Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit over a package carrier; pressing an encapsulation onto the package carrier and with the integrated circuit therein; mounting a conductive frame, having a vertical pillar integral with a horizontal cover, through the encapsulation, over the integrated circuit, and the vertical pillar on the package carrier and the horizontal cover on the encapsulation; and forming a contact from the horizontal cover.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: July 9, 2013
    Assignee: STATS ChipPAC Ltd.
    Inventor: Reza Argenty Pagaila
  • Patent number: 8466057
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a via hole in the substrate, the via hole having a top end and a bottom end with the bottom end is larger than the top end; forming a pad on the substrate, the pad encloses the top end of the via hole; and reflowing a conductive filler having higher volume than the via hole over the via hole, the conductive filler having a protrusion extending from the bottom end and the bottom end entirely overlaps at least one surface of the protrusion.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: June 18, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Linda Pei Ee Chua, Byung Tai Do, Reza Argenty Pagaila
  • Patent number: 8420950
    Abstract: A method of manufacture of a circuit system includes: providing a carrier base; forming a cavity in the carrier base; forming a bridge lead over the cavity, the bridge lead exposing the cavity; and mounting a device having an anchor interconnect, the anchor interconnect is in the cavity and conformal to the bridge lead over the cavity.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: April 16, 2013
    Assignee: STATS ChipPAC Ltd.
    Inventors: Seng Guan Chow, Heap Hoe Kuan, Reza Argenty Pagaila
  • Patent number: 8404518
    Abstract: A method of manufacture of an integrated circuit packaging system including: fabricating a base package substrate having component pads and stacking pads; coupling a base integrated circuit die to the component pads; forming a penetrable encapsulation material for enclosing the base integrated circuit die and the component pads on the base package substrate; and coupling stacked interconnects on the stacking pads adjacent to and not contacting the penetrable encapsulation material.
    Type: Grant
    Filed: December 13, 2009
    Date of Patent: March 26, 2013
    Assignee: STATS ChipPAC Ltd.
    Inventors: Byung Tai Do, Rui Huang, Reza Argenty Pagaila
  • Patent number: 8406004
    Abstract: A method of manufacture of an integrated circuit packaging system includes providing an integrated circuit having an active side and a non-active side; forming an indent, having a flange and an indent side, from a peripheral region of the active side; and forming a conformal interconnect, having an elevated segment, a slope segment, and a flange segment, over the indent.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: March 26, 2013
    Assignee: STATS ChipPAC Ltd.
    Inventors: Reza Argenty Pagaila, Byung Tai Do, Linda Pei Ee Chua