Abstract: A data storage system for detecting a location of a head relative to a magnetic media is described. This system comprises arms, a preamplifier circuit coupled to the arms for controlling the arms, a proximity sensing system positioned within the preamplifier circuit, the proximity sensing system comprising: an input stage for transmitting an input sense signal; a programmable gain stage coupled to receive the input sense signal and operative for transmitting a gain signal in response to receiving the input sense signal; a multiplexer coupled to receive the gain signal and at least one control signal, the multiplexer operative for transmitting a multiplexed signal; a detector coupled to receive the multiplexed signal and a second control signal, the detector operative for transmitting an output signal; wherein an amplitude associated with the output signal enables detecting the location of the head.

Abstract: Embodiments of an integrated circuit package security fence are provided. The integrated circuit package includes a substrate, a die, and a security fence coupled to the substrate such that the die is located between the security fence and the substrate. The security fence includes a first signal net having a plurality of bonding wires and a second signal net having a second plurality of bonding wires. The bonding wires of the first signal net and second signal net are arranged in a pattern to overlap the top surface of die. The die may include tamper detection logic to detect attempt to access the die through the security fence.

Abstract: A data storage system for detecting a location of a head relative to a magnetic media is described. This system comprises arms, a preamplifier circuit coupled to the arms for controlling the arms, a proximity sensing system positioned within the preamplifier circuit, the proximity sensing system comprising: an input stage for transmitting an input sense signal; a programmable gain stage coupled to receive the input sense signal and operative for transmitting a gain signal in response to receiving the input sense signal; a multiplexer coupled to receive the gain signal and at least one control signal, the multiplexer operative for transmitting a multiplexed signal; a detector coupled to receive the multiplexed signal and a second control signal, the detector operative for transmitting an output signal; wherein an amplitude associated with the output signal enables detecting the location of the head.

Abstract: A reduced power driver is described. This reduced power driver comprises: an input current driver for transmitting a current signal that is a fraction of a DC current signal; a first resistor coupled at one end to a first voltage supply; a first current driver coupled to the input current driver and a first switch control; a second switch coupled a first current driver output, another end of the first resistor, and the output control; a dynamic booster coupled between the first voltage supply and the output control; and wherein the reduced power driver is operative for selectively adding an overshoot current to the output control so that power consumption is reduced, while synchronizing the DC current signal with the overshoot current.

Abstract: Methods, systems, and apparatuses are provided for three-dimensional coiling via structures. A substrate includes a plurality of insulating layers, a plurality of trace layers interleaved with the insulating layers, and a three-dimensional coiling via. The three-dimensional coiling via includes a plurality of electrically conductive traces and a plurality of electrically conductive vias through the insulating layers. The electrically conductive traces are present in at least two of the traces layers and are coupled together by the electrically conductive vias. The electrically conductive traces are arranged to form at least one partial turn around an axis through the substrate.

Abstract: A current switching system is described. This system includes first and second mirrored devices coupled to each other and a coupled terminal, and the first and second mirrored devices are coupled to an input terminal and an output terminal; a storage element in element in parallel with the first mirrored device and the first degeneration device; a variable impedance device coupled between the coupled terminal and a low voltage device; and a current mirroring accuracy enhancing circuit coupled between the coupled terminal and a high voltage device, wherein the variable impedance device dynamically changes a current at the coupled terminal to a second level depending when a threshold is met, and an impedance on the coupled terminal remains low both before switching and during switching.

Abstract: Within hard disk drives (HDDs), for example, a preamplifier or preamp is generally used to perform read and write operations with a magnetic head. Typically, for write operations, the preamplifier generates a current waveform that uses a DC current to polarize magnetic elements within the disk and overshoot components to compensate for frequency dependent attenuation in the interconnect between the head and preamp. Conventional pulse-shaping circuitry used for this application uses high voltage to accomplish this task. Here, however, pulse-shaping circuitry is provided which can generate a similar waveform using lower voltage (i.e., about 5V) for this application and others.

Abstract: One embodiment of the invention includes a current-mirror system. The system includes a current-mirror circuit configured to conduct an input current through a first current path that includes a first degeneration resistance device and to generate an output current that flows through a second current path that includes a second degeneration resistance device. The output current can be substantially proportional to the input current. The system also includes a degeneration control circuit configured to maintain a substantially constant degeneration voltage across each of the first and second degeneration resistance devices.

Abstract: A reduced power driver is described. This reduced power driver comprises: an input current driver for transmitting a current signal that is a fraction of a DC current signal; a first resistor coupled at one end to a first voltage supply; a first current driver coupled to the input current driver and a first switch control; a second switch coupled a first current driver output, another end of the first resistor, and the output control; a dynamic booster coupled between the first voltage supply and the output control; and wherein the reduced power driver is operative for selectively adding an overshoot current to the output control so that power consumption is reduced, while synchronizing the DC current signal with the overshoot current.

Abstract: Systems and methods are disclosed that can be used to control an output signal, such as for controlling a heater for a hard disk drive. A system can include a pre-driver configured to provide a pulse-width modulated (PWM) signal to an output system in response to a control signal and a feedback signal, the output system being configured to provide an output signal for driving a load, the pre-driver comprising a modulator that provides the PWM signal in response to the control signal and a filtered feedback signal. A low pass filter is configured to receive a feedback signal with a voltage corresponding to a voltage of the output signal, wherein the low pass filter provides the filtered feedback signal that controls a frequency of the PWM signal to the modulator, the low pass filter having a bulk driven operational transconductance amplifier.

Abstract: Systems and methods are disclosed that can be used to control an output signal, such as for controlling a heater for a hard disk drive. A system can include a pre-driver configured to provide a pulse-width modulated (PWM) signal to an output system in response to a control signal and a feedback signal, the output system being configured to provide an output signal for driving a load, the pre-driver comprising a modulator that provides the PWM signal in response to the control signal and a filtered feedback signal. A low pass filter is configured to receive a feedback signal with a voltage corresponding to a voltage of the output signal, wherein the low pass filter provides the filtered feedback signal that controls a frequency of the PWM signal to the modulator, the low pass filter having a bulk driven operational transconductance amplifier.

Abstract: The present disclosure relates to an integrated circuit packaging, a strip having a plurality of integrated circuit packages, and method of manufacture thereof, and more particularly, to a substrate having an integrated overhang support structure to support a ledge created by stacking a large circuit die on a small circuit die. In one embodiment, the upper substrate surface comprises a protrusion as an integrated support structure. The structure may include passages to direct the flow of underfill into the limited support area to create an open area for vacuum or for placement of passive or active components.

Abstract: A disk drive data storage system, comprising a magnetic disk a head for writing data to the disk, and circuitry for providing a first voltage (HWX) to a first node (N1) and a second voltage (HWY) to a second node (N2). The first and second voltage circuitry comprises a first transistor (421P2) of a first type and coupled to the first node, a first transistor (422N2) of a second type and coupled to the second node, a second transistor (441P2) of the first type and coupled to the second node, and a second transistor (442N2) of the second type and coupled to the node. The system also comprises circuitry for providing, during a first time period, a first biasing signal (VNDY) and a second biasing signal (VPDY) and circuitry for providing, during a second time period, a third biasing signal (VNDX) and a fourth biasing signal (VPDX).

Abstract: A reader input amplifier for a hard disk drive including a gm-amp that compensates for any X-Y imbalance to reduce an excursion, and the time period of the excursion until a final settling point.

Abstract: The present invention achieves technical advantages as a write driver preamplifier circuit providing a higher output voltage than that of the supply voltage, and utilizing smaller capacitors. The circuit generates a differential voltage across the writer output larger than the supply voltage. Advantageously, during the DC portion of the write current, such as when HWX and HWY are almost at ground, small capacitors are each charged by a capacitive driver to half of the total supply voltage. When the writer toggles, the capacitor drivers switch the capacitors from one supply to the other supply. As the capacitors discharge, the voltage decreases and then the capacitors are charged with the opposite polarity.

Abstract: A disk drive data storage system. The system comprises a magnetic disk and a head for writing data to the disk. The system also comprises circuitry for providing a first voltage (HWX) to a first node (N1) and a second voltage (HWY) to a second node (N2). The head is coupled to the first and second nodes such that a data state is written to the disk in response to the first and second voltage. The first and second voltage circuitry comprises a first transistor (421P2) of a first type and coupled to the first node, a first transistor (422N2) of a second type and coupled to the second node, a second transistor (441P2) of the first type and coupled to the second node, and a second transistor (442N2) of the second type and coupled to the second node.

Abstract: A differential circuit to read differential data from a disk by a voltage bias on a read head, including a read circuit to read the differential data from the disk by maintaining the voltage bias on the read head, a optimal voltage circuit determines the optimal voltage bias to be applied to the read head, and a circuit to apply said optimal voltage bias to the read head.

Abstract: A circuit (50) and method are presented to provide positive biasing voltages to an MR head (18) in a mass data storage device (10). The circuit (50) includes upper (56) and lower (62) driver transistors to respectively bias respective opposite ends of the MR head (18) with positive voltages. A feedback circuit (58,60,74,84) controls a lower voltage (63) of the positive voltages to be a value as close as possible to a saturation voltage of the lower driver transistor (62), without causing the lower transistor (62) to saturate. Since the MR head (18) is connected between the upper (56) and lower (62) driver transistors, maintaining the lower voltage (63) just above the saturation voltage of the lower driver transistor (62) reduces the common mode voltage across the MR head (18) to a minimum value.