Patents by Inventor Ricardo Jaliff

Ricardo Jaliff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MPEG decoder
    Patent number: 5557538
    Abstract: An MPEG decoder which distributes the processing load to a plurality of processors and units including an external memory and a bus interface unit, a de-multiplexing data processor, an image data processor, an inverse transform and reconstruction processor, and a prediction calculation unit. A video post-processing unit generates video data, and a serial port unit provides an output for audio data.
    Type: Grant
    Filed: May 18, 1994
    Date of Patent: September 17, 1996
    Assignee: Zoran Microelectronics Ltd.
    Inventors: Refael Retter, Moshe Bublil, Gad Shavit, Aharon Gill, Ricardo Jaliff, Ram Ofir, Alon Boner, Oded Ilan, Eliezer Hassut
  • Bus arbitration and resource management for concurrent vector signal processor architecture
    Patent number: 5263169
    Abstract: A concurrent vector signal processor includes a resource manager for utilization of captive signal processing resources. The first instructions in a temporary instruction queue are predecoded and the signal processing resources are selected to execute those first instructions.Arbitration system is provided for external buses connected to a concurrent vector signal processor. A processor arbiter supervises on a priority basis both captive processor resources and independent processor resources. A bus arbiter supervises on a priority basis external and internal buses.
    Type: Grant
    Filed: October 20, 1991
    Date of Patent: November 16, 1993
    Assignee: Zoran Corporation
    Inventors: Alexander Genusov, Ram B. Friedlander, Peter Feldman, Ricardo Jaliff
  • Architecture for integrated concurrent vector signal processor
    Patent number: 5179530
    Abstract: Multiple special purpose processing units are provided in a vector signal processor for concurrent, parallel processing, particularly of complex vectors. The principal processing units are an execution unit, a data movement unit, a control/register unit, a vector buffer unit, an instruction fetch unit, and a bus interface unit.
    Type: Grant
    Filed: May 31, 1991
    Date of Patent: January 12, 1993
    Assignee: Zoran Corporation
    Inventors: Alexander Genusov, Ram B. Friedlander, Peter Feldman, Vlad Fruchter, Ricardo Jaliff, Asaf Mohr, Rafi Retter