Patents by Inventor Riccardo Martignone
Riccardo Martignone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8174807Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.Type: GrantFiled: August 1, 2011Date of Patent: May 8, 2012Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Sergio Pernici
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Publication number: 20110279936Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.Type: ApplicationFiled: August 1, 2011Publication date: November 17, 2011Applicant: STMICROELECTRONICS S.R.L.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Sergio Pernici
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Patent number: 8014112Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.Type: GrantFiled: June 3, 2008Date of Patent: September 6, 2011Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Sergio Pernici
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Patent number: 7986181Abstract: A calibration circuit for calibrating an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance, the calibration circuit generating a calibration signal for calibrating the capacitance and including a calibration loop, suitable to carry out a calibration cycle in several sequential steps.Type: GrantFiled: February 21, 2008Date of Patent: July 26, 2011Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Germano Nicollini
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Patent number: 7742893Abstract: A calibration circuit calibrates an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance. The calibration circuit outputs a calibration signal carrying information for calibrating the capacitor and includes a calibration loop.Type: GrantFiled: February 21, 2008Date of Patent: June 22, 2010Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Marco Zamprogno
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Patent number: 7675449Abstract: A current steering digital-analog converter for converting a digital code into an analog signal, the converter including a substrate of semiconductor material, an array of current generators integrated in the substrate, a common summation node and switches controllable on the basis of the digital code for connecting and disconnecting the current generators to and from the common summation node. The current generators are adapted to provide the common summation node with currents having a multiple value according to a power of two compared to a unit current value provided to the summation node by a current generator of the array of generators. The current generator is divided into a base number of modular current generation elements in parallel to one another at least equal to two.Type: GrantFiled: July 14, 2008Date of Patent: March 9, 2010Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Marco Zamprogno, Riccardo Martignone
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Publication number: 20090051401Abstract: A calibration circuit for calibrating an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance, the calibration circuit generating a calibration signal for calibrating the capacitance and including a calibration loop, suitable to carry out a calibration cycle in several sequential steps.Type: ApplicationFiled: February 21, 2008Publication date: February 26, 2009Applicant: STMICROELECTRONICS S.R.L.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Germano Nicollini
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Publication number: 20090040669Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.Type: ApplicationFiled: June 3, 2008Publication date: February 12, 2009Applicant: STMICROELECTRONICS S.R.L.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Sergio Pernici
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Publication number: 20090033531Abstract: A current steering digital-analog converter for converting a digital code into an analog signal, the converter including a substrate of semiconductor material, an array of current generators integrated in the substrate, a common summation node and switches controllable on the basis of the digital code for connecting and disconnecting the current generators to and from the common summation node. The current generators are adapted to provide the common summation node with currents having a multiple value according to a power of two compared to a unit current value provided to the summation node by a current generator of the array of generators. The current generator is divided into a base number of modular current generation elements in parallel to one another at least equal to two.Type: ApplicationFiled: July 14, 2008Publication date: February 5, 2009Applicant: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Marco Zamprogno, Riccardo Martignone
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Publication number: 20080221823Abstract: A calibration circuit calibrates an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance. The calibration circuit outputs a calibration signal carrying information for calibrating the capacitor and includes a calibration loop.Type: ApplicationFiled: February 21, 2008Publication date: September 11, 2008Applicant: STMICROELECTRONICS S.r.I.Inventors: Pierangelo Confalonieri, Riccardo Martignone, Marco Zamprogno
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Patent number: 7400285Abstract: A circuit for reconstructing an analog signal starting from a digital input signal includes a digital to analog converter and a low pass-filter connected at the output of the converter for receiving the analog format signal and outputting a reconstructed analog signal. The low pass filter is an active filter continuous in time and current-coupled to the output of the digital-analog converter. The digital-analog converter is of the current-steering type functioning at a sampling frequency greater than the Nyquist frequency of the analog signal.Type: GrantFiled: May 19, 2005Date of Patent: July 15, 2008Assignee: STMicroelectronics S.R.L.Inventors: Germano Nicollini, Pierangelo Confalonieri, Riccardo Martignone
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Patent number: 7348912Abstract: A digital-to-analog converter includes a first section (MSB) that converts the more significant bits of a digital code into a first voltage (Vin) of a multiplicity of discrete voltages that are integral multiples of a predetermined first voltage step (?V1). A second section (LSB) of the converter converts the less significant bits of the digital code into a current. The current is transformed into a second voltage of a multiplicity of discrete voltages that are integral multiples of a second voltage step (?V2) equal to ½ L of the product of the first voltage step (?V1) multiplied by a predetermined coefficient, where L is the number of the less significant bits of the digital code to be converted. A summer generates an output voltage (Vout) that is the sum of the second voltage and the product of the first voltage multiplied by the predetermined coefficient. With a view to obtaining a low consumption, the summer has a resistive feedback circuit including a voltage divider (R3, R4).Type: GrantFiled: November 14, 2005Date of Patent: March 25, 2008Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Germano Nicollini, Riccardo Martignone
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Publication number: 20070262894Abstract: There is described a circuit for reconstructing an analog signal from a digital signal and wide-band transmission system, particularly for employment in cellular telephony systems, or more in general in mobile communication systems, that adopt the WCDMA standard. The circuit comprises: a digital to analog converter (DAC) suitable for receiving said digital signal and converting it into signal in analog.format;—a low pass-filter (LOW-PASS) connected at the output of said converter for receiving said signal in analog format and providing as output said reconstructed analog signal. Advantageously, the low pass filter (LOW-PASS) is an active filter continuous in time and current coupled to the output of the digital-analog converter (DAC) and the digital-analog converter (DAC) is a converter of the current-steering type functioning at sampling frequency greater than the Nyquist frequency of said analog signal to be reconstructed.Type: ApplicationFiled: May 19, 2005Publication date: November 15, 2007Applicant: STMICROELECTRONICS S.R.L.Inventors: Germano Nicollini, Pierangelo Confalonieri, Riccardo Martignone
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Patent number: 7098831Abstract: A digital-to-analog converter includes a first section (MSB) that converts the more significant bits of a digital code into a first voltage (Vin) of a multiplicity of discrete voltages that are integral multiples of a predetermined first voltage step (?V1). A second section (LSB) of the converter converts the less significant bits of the digital code into a current. The current is transformed into a second voltage of a multiplicity of discrete voltages that are integral multiples of a second voltage step (?V2) equal to ½L of the product of the first voltage step (?V1) multiplied by a predetermined coefficient, where L is the number of the less significant bits of the digital code to be converted. A summer generates an output voltage (Vout) that is the sum of the second voltage and the product of the first voltage multiplied by the predetermined coefficient. With a view to obtaining a low consumption, the summer has a resistive feedback circuit including a voltage divider (R3, R4).Type: GrantFiled: March 2, 2004Date of Patent: August 29, 2006Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Germano Nicollini, Riccardo Martignone
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Publication number: 20060066463Abstract: A digital-to-analog converter includes a first section (MSB) that converts the more significant bits of a digital code into a first voltage (Vin) of a multiplicity of discrete voltages that are integral multiples of a predetermined first voltage step (?V1). A second section (LSB) of the converter converts the less significant bits of the digital code into a current. The current is transformed into a second voltage of a multiplicity of discrete voltages that are integral multiples of a second voltage step (?V2) equal to ½ L of the product of the first voltage step (?V1) multiplied by a predetermined coefficient, where L is the number of the less significant bits of the digital code to be converted. A summer generates an output voltage (Vout) that is the sum of the second voltage and the product of the first voltage multiplied by the predetermined coefficient. With a view to obtaining a low consumption, the summer has a resistive feedback circuit including a voltage divider (R3, R4).Type: ApplicationFiled: November 14, 2005Publication date: March 30, 2006Inventors: Pierangelo Confalonieri, Germano Nicollini, Riccardo Martignone
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Patent number: 6940348Abstract: The circuit comprises a differential amplifier with two inputs and two outputs and a common mode regulation circuit. Between a regulation terminal of the amplifier and the outputs there are connected first and second capacitors and first and second capacitive elements that by controlled switches are connected in parallel with, respectively, the first and second capacitors or alternately between first and second reference voltage terminals. The common mode output voltage is not exactly fixed at the beginning of the design, but is determined by attributing appropriate values to the first and second capacitive elements; more particularly, their capacitances C3 and C4 are chosen in such a way as to satisfy the following equality: Vcmn=Vrefl+[(Vrefp?Vrefm)/2]*(C4?C3)/(C3+C4), where Vcmn is the desired common mode output voltage, Vrefp and Vrefm are the differential output voltages and Vrefl is the voltage of the second reference terminal.Type: GrantFiled: July 5, 2002Date of Patent: September 6, 2005Assignee: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Germano Nicollini, Riccardo Martignone
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Publication number: 20040233089Abstract: A digital-to-analog converter includes a first section (MSB) that converts the more significant bits of a digital code into a first voltage (Vin) of a multiplicity of discrete voltages that are integral multiples of a predetermined first voltage step (&Dgr;V1). A second section (LSB) of the converter converts the less significant bits of the digital code into a current. The current is transformed into a second voltage of a multiplicity of discrete voltages that are integral multiples of a second voltage step (&Dgr;V2) equal to ½L of the product of the first voltage step (&Dgr;V1) multiplied by a predetermined coefficient, where L is the number of the less significant bits of the digital code to be converted. A summer generates an output voltage (Vout) that is the sum of the second voltage and the product of the first voltage multiplied by the predetermined coefficient. With a view to obtaining a low consumption, the summer has a resistive feedback circuit including a voltage divider (R3, R4).Type: ApplicationFiled: March 2, 2004Publication date: November 25, 2004Applicant: STMicroelectronics S.r.l.Inventors: Pierangelo Confalonieri, Germano Nicollini, Riccardo Martignone
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Publication number: 20040169555Abstract: The circuit comprises a differential amplifier (10) with two inputs and two outputs and a common mode regulation circuit. Between a regulation terminal (INCM) of the amplifier and the outputs there are connected a first (C1p) and a second (1m) capacitor and first (C3) and second (C4) capacitive means that by means of controlled switches (SW9-SW12) can be alternatively and simultaneousy connected in parallel with, respectively, the first ((C1p) and the second (C1m) capacitor or between a first (VB) and a second (Vref1) reference voltage terminal.Type: ApplicationFiled: April 26, 2004Publication date: September 2, 2004Inventors: Pierangelo Confalonieri, Germano Nicollini, Riccardo Martignone