Patents by Inventor Richard A. Swetz
Richard A. Swetz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11914902Abstract: Shared memory access in a distributed system, including: receiving a memory access request associated with a time value; determining, based on the time value, an entry in a translation lookaside buffer (TLB); and determining, based on the entry, whether to allow the memory access request.Type: GrantFiled: February 28, 2023Date of Patent: February 27, 2024Assignee: GHOST AUTONOMY INC.Inventors: John Hayes, Volkmar Uhlig, Richard A. Swetz, Daniel P. Potts, Aaron Carroll
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Patent number: 11640268Abstract: Shared memory access in a distributed system, including: determining, in response to a memory access request, based on a time value, an entry in an access permissions table by: determining, based on a modulo of the time value and a number of entries in the access permissions table, a table index; determining, based on the table index, the entry; and determining, based on the entry, whether to allow the memory access request.Type: GrantFiled: June 14, 2022Date of Patent: May 2, 2023Assignee: GHOST AUTONOMY INC.Inventors: John Hayes, Volkmar Uhlig, Richard A. Swetz, Daniel P. Potts, Aaron Carroll
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Patent number: 11640342Abstract: Fault state transitions in an autonomous vehicle may include determining that a first node of a plurality of nodes has failed; determining, in response to the first node failing, a failure state; determining, based on the failure state, a configuration for the plurality of nodes excluding the first node; and applying the configuration.Type: GrantFiled: October 29, 2020Date of Patent: May 2, 2023Assignee: GHOST AUTONOMY INC.Inventors: John Hayes, Volkmar Uhlig, Richard A. Swetz, Daniel P. Potts
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Publication number: 20220308797Abstract: Shared memory access in a distributed system, including: determining, in response to a memory access request, based on a time value, an entry in an access permissions table by: determining, based on a modulo of the time value and a number of entries in the access permissions table, a table index; determining, based on the table index, the entry; and determining, based on the entry, whether to allow the memory access request.Type: ApplicationFiled: June 14, 2022Publication date: September 29, 2022Inventors: JOHN HAYES, VOLKMAR UHLIG, RICHARD A. SWETZ, DANIEL P. POTTS, AARON CARROLL
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Patent number: 11397543Abstract: Timed memory access, including: determining, in response to a memory access request, based on a time value, an entry in an access permissions table; and determining, based on the entry, whether to allow the memory access request that can include determining, based on a modulo of the time value and a number of entries in the access permissions table, a table index and determining, based on the table index, the entry.Type: GrantFiled: October 30, 2020Date of Patent: July 26, 2022Assignee: Ghost Locomotion Inc.Inventors: John Hayes, Volkmar Uhlig, Richard A. Swetz, Daniel P. Potts, Aaron Carroll
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Publication number: 20210316742Abstract: Error handling in an autonomous vehicle, including: receiving, by a control system of the autonomous vehicle, from an automation computing system, a remediation sequence comprising a first plurality of operational commands determined to bring the autonomous vehicle to a stop; determining, by the control system, that the error state associated with the autonomous vehicle has been reached; and executing, by the control system, in response to the error state being reached, the first plurality of operational commands.Type: ApplicationFiled: April 8, 2020Publication date: October 14, 2021Inventors: JOHN HAYES, VOLKMAR UHLIG, AARON CARROLL, RICHARD A. SWETZ, NIMA SOLTANI, TIMOTHY CEREXHE
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Publication number: 20210132865Abstract: Timed memory access, including: determining, in response to a memory access request, based on a time value, an entry in an access permissions table; and determining, based on the entry, whether to allow the memory access request that can include determining, based on a modulo of the time value and a number of entries in the access permissions table, a table index and determining, based on the table index, the entry.Type: ApplicationFiled: October 30, 2020Publication date: May 6, 2021Inventors: JOHN HAYES, VOLKMAR UHLIG, RICHARD A. SWETZ, DANIEL P. POTTS, AARON CARROLL
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Publication number: 20210133057Abstract: Fault state transitions in an autonomous vehicle may include determining that a first node of a plurality of nodes has failed; determining, in response to the first node failing, a failure state; determining, based on the failure state, a configuration for the plurality of nodes excluding the first node; and applying the configuration.Type: ApplicationFiled: October 29, 2020Publication date: May 6, 2021Inventors: JOHN HAYES, VOLKMAR UHLIG, RICHARD A. SWETZ, DANIEL P. POTTS
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Patent number: 9088284Abstract: There is broadly contemplated herein an arrangement whereby each event source feeds a small dedicated “pre-counter” while an actual count is kept in a 64-bit wide RAM. Such an implementation preferably may involve a state machine that simply sweeps through the pre-counters, in a predetermined fixed order. Preferably, the state machine will access each pre-counter, add the value from the pre-counter to a corresponding RAM location, and then clear the pre-counter. Accordingly, the pre-counters merely have to be wide enough such that even at a maximal event rate, the pre-counter will not be able to wrap (i.e., reach capacity or overflow) before the “sweeper” state machine accesses the pre-counter.Type: GrantFiled: February 25, 2013Date of Patent: July 21, 2015Assignee: International Business Machines CorporationInventors: Carl Alfred Bender, Peter Heiner Hochschild, Ashutosh Misra, Richard Swetz
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Patent number: 8660234Abstract: There is broadly contemplated herein an arrangement whereby each event source feeds a small dedicated “pre-counter” while an actual count is kept in a 64-bit wide RAM. Such an implementation preferably may involve a state machine that simply sweeps through the pre-counters, in a predetermined fixed order. Preferably, the state machine will access each pre-counter, add the value from the pre-counter to a corresponding RAM location, and then clear the pre-counter. Accordingly, the pre-counters merely have to be wide enough such that even at a maximal event rate, the pre-counter will not be able to wrap (i.e., reach capacity or overflow) before the “sweeper” state machine accesses the pre-counter.Type: GrantFiled: July 31, 2008Date of Patent: February 25, 2014Assignee: International Business Machines CorporationInventors: Carl Alfred Bender, Peter Heiner Hochschild, Ashutosh Misra, Richard Swetz
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Patent number: 8412974Abstract: A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.Type: GrantFiled: January 29, 2010Date of Patent: April 2, 2013Assignee: International Business Machines CorporationInventors: Dong Chen, Matthew R. Ellavsky, Ross L. Franke, Alan Gara, Thomas M. Gooding, Rudolf A. Haring, Mark J. Jeanson, Gerard V. Kopcsay, Thomas A. Liebsch, Daniel Littrell, Martin Ohmacht, Don D. Reed, Brandon E. Schenck, Richard A. Swetz
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Patent number: 8031639Abstract: In order to solve the problem of the detection of the arrival of duplicate data packets in an interconnected, multinode data processing system, each data packet is provided with a field of r bits that are randomly generated for each data packet. However, one of the packets is provided with a field that is computed from the other randomly generated field entries in a checksum computation which yields a selected nonzero checksum value. A running checksum at the receiver is used to determine whether or not, after the receipt of the specified number, k, of data packets, a duplicate packet has been received.Type: GrantFiled: September 17, 2009Date of Patent: October 4, 2011Assignee: International Business Machines CorporationInventors: Carl A. Bender, Fu Chung Chang, Kevin J. Gildea, Rama K. Govindaraju, Jay R. Herring, Peter H. Hochschild, Richard A. Swetz
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Patent number: 8001401Abstract: An apparatus and method for controlling power usage in a computer includes a plurality of computers communicating with a local control device, and a power source supplying power to the local control device and the computer. A plurality of sensors communicate with the computer for ascertaining power usage of the computer, and a system control device communicates with the computer for controlling power usage of the computer.Type: GrantFiled: June 26, 2007Date of Patent: August 16, 2011Assignee: International Business Machines CorporationInventors: Ralph E. Bellofatto, Paul W. Coteus, Paul G. Crumley, Alan G. Gara, Mark E. Giampapa, Thomas M. Gooding, Rudolf A. Haring, Mark G. Megerian, Martin Ohmacht, Don D. Reed, Richard A. Swetz, Todd Takken
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Publication number: 20110119475Abstract: A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.Type: ApplicationFiled: January 29, 2010Publication date: May 19, 2011Applicant: International Business Machines CorporationInventors: Dong Chen, Matthew R. Ellavsky, Ross L. Franke, Alan Gara, Thomas M. Gooding, Rudolf A. Haring, Mark J. Jeanson, Gerard V. Kopcsay, Thomas A. Liebsch, Daniel Littrell, Martin Ohmacht, Don D. Reed, Brandon E. Schenck, Richard A. Swetz
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Publication number: 20100027735Abstract: There is broadly contemplated herein an arrangement whereby each event source feeds a small dedicated “pre-counter” while an actual count is kept in a 64-bit wide RAM. Such an implementation preferably may involve a state machine that simply sweeps through the pre-counters, in a predetermined fixed order. Preferably, the state machine will access each pre-counter, add the value from the pre-counter to a corresponding RAM location, and then clear the pre-counter. Accordingly, the pre-counters merely have to be wide enough such that even at a maximal event rate, the pre-counter will not be able to wrap (i.e., reach capacity or overflow) before the “sweeper” state machine accesses the pre-counter.Type: ApplicationFiled: July 31, 2008Publication date: February 4, 2010Inventors: Carl Alfred Bender, Peter Heiner Hochschild, Ashutosh Misra, Richard Swetz
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Publication number: 20100008251Abstract: In order to solve the problem of the detection of the arrival of duplicate data packets in an interconnected, multinode data processing system, each data packet is provided with a field of r bits that are randomly generated for each data packet. However, one of the packets is provided with a field that is computed from the other randomly generated field entries in a checksum computation which yields a selected nonzero checksum value. A running checksum at the receiver is used to determine whether or not, after the receipt of the specified number, k, of data packets, a duplicate packet has been received.Type: ApplicationFiled: September 17, 2009Publication date: January 14, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Carl A. Bender, Fu Chung Chang, Kevin J. Gildea, Rama K. Govindaraju, Jay R. Herring, Peter H. Hochschild, Richard A. Swetz
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Patent number: 7619993Abstract: In order to solve the problem of the detection of the arrival of duplicate data packets in an interconnected, multinode data processing system, each data packet is provided with a field of r bits that are randomly generated for each data packet. However, one of the packets is provided with a field that is computed from the other randomly generated field entries in a checksum computation which yields a selected nonzero checksum value. A running checksum at the receiver is used to determine whether or not, after the receipt of the specified number, k, of data packets, a duplicate packet has been received.Type: GrantFiled: November 1, 2005Date of Patent: November 17, 2009Assignee: International Business Machines CorporationInventors: Carl A. Bender, Fu Chung Chang, Kevin J. Gildea, Rama J. Govindaraju, Jay R. Herring, Peter H. Hochschild, Richard A. Swetz
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Patent number: 7477608Abstract: There is provided a method for routing packets on a linear of N processors connected in a nearest neighbor configuration. The method includes the step of, for each end processor of the array, connecting unused outputs to corresponding unused inputs. For each axis required to directly route a packet from a source to a destination processor, the following steps are performed. It is determined whether a result of directly sending a packet from an initial processor to a target processor is less than or greater than N/2 moves, respectively. The initial processor is the source processor in the first axis, and the target processor is the destination processor in the last axis. The packet is directly sent from the initial processor to the target processor, when the result is less than N/2 moves. The packet is indirectly sent so as to wrap around each end processor, when the result is greater than N/2 moves.Type: GrantFiled: July 21, 2005Date of Patent: January 13, 2009Assignee: International Business Machines CorporationInventors: Monty M. Denneau, Peter H. Hochschild, Richard A. Swetz, Henry S. Warren, Jr.
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Publication number: 20090006873Abstract: An apparatus and method for controlling power usage in a computer includes a plurality of computers communicating with a local control device, and a power source supplying power to the local control device and the computer. A plurality of sensors communicate with the computer for ascertaining power usage of the computer, and a system control device communicates with the computer for controlling power usage of the computer.Type: ApplicationFiled: June 26, 2007Publication date: January 1, 2009Applicant: International Business Machines CorporationInventors: Ralph E. Bellofatto, Paul W. Coteus, Paul G. Crumley, Alan G. Gara, Mark E. Giampapa, Thomas M. Gooding, Rudolf Haring, Mark G. Megerian, Martin Ohmacht, Don D. Reed, Richard A. Swetz, Todd Takken
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Publication number: 20070097875Abstract: In order to solve the problem of the detection of the arrival of duplicate data packets in an interconnected, multinode data processing system, each data packet is provided with a field of r bits that are randomly generated for each data packet. However, one of the packets is provided with a field that is computed from the other randomly generated field entries in a checksum computation which yields a selected nonzero checksum value. A running checksum at the receiver is used to determine whether or not, after the receipt of the specified number, k, of data packets, a duplicate packet has been received.Type: ApplicationFiled: November 1, 2005Publication date: May 3, 2007Applicant: International Business Machines CorporationInventors: Carl Bender, Fu Chang, Kevin Gildea, Rama Govindaraju, Jay Herring, Peter Hochschild, Richard Swetz