Patents by Inventor Richard Bousquet

Richard Bousquet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230222276
    Abstract: Techniques are disclosed for eliminating redundancy in fault simulations to improve efficiency and to reduce the time and computing power required to generate a robust fault list, which results in adequate diagnostic coverage of a particular post-silicon electronic device for functional safety applications. The techniques described herein implement an automated methodology to identify identical sub-circuits in a design after the design is synthesized to gates, and utilize isomorphism to define a manner in which identical blocks may be reliably identified to ensure adequate coverage and accurate, consistent fault injection results. The netlist may advantageously implement a “flat” as opposed to a hierarchal design. Moreover, multiple levels of granularity may be identified for the various sub-circuits associated with the reference graphs used to identify isomorphic sub-graphs.
    Type: Application
    Filed: June 25, 2020
    Publication date: July 13, 2023
    Inventors: Richard Bousquet, Anandh Krishnan, Vyasa Sai, Andrea Kroll, Mauro Pipponzi
  • Patent number: 10866885
    Abstract: Methods, systems and apparatuses may provide for technology that applies a functional safety test stimulus to a hardware level simulator, automatically compiles an output of the hardware level simulator into a software test library (STL), and iteratively verifies that the diagnostic coverage of the STL file approximates the diagnostic coverage of the functional safety test stimulus.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: December 15, 2020
    Assignee: Intel Corporation
    Inventors: Krishnan Anandh, Richard Bousquet, Vyasa Sai, Andrea Kroll, Mauro Pipponzi
  • Publication number: 20190227915
    Abstract: Methods, systems and apparatuses may provide for technology that applies a functional safety test stimulus to a hardware level simulator, automatically compiles an output of the hardware level simulator into a software test library (STL), and iteratively verifies that the diagnostic coverage of the STL file approximates the diagnostic coverage of the functional safety test stimulus.
    Type: Application
    Filed: March 29, 2019
    Publication date: July 25, 2019
    Inventors: Krishnan Anandh, Richard Bousquet, Vyasa Sai, Andrea Kroll, Mauro Pipponzi
  • Publication number: 20100196799
    Abstract: The present invention relates to the use of the A286 alloy grade for the manufacture of a sheet, optionally surfaced, making it possible to obtain a conducting plate of mono polar or bipolar type for a fuel cell element. The invention also relates to this optional surface treatment process, which comprises a cold-rolling step followed by a continuous annealing step in an oxidizing atmosphere and by an acid pickling step.
    Type: Application
    Filed: June 19, 2007
    Publication date: August 5, 2010
    Applicants: L'Air Liquide Societe Anonyme Pour L'Etude et L'Exploration DesProcedes George Claude, Arcelormittal-Stainless & Nickel Alloys, Alfa Laval Corporate AB
    Inventors: Eric Claude, Richard Bousquet, Gilles Platen, Claude Roussel