Abstract: The invention relates to testing apparatus, such as the type known as a burn-in test socket for integrated circuit "chips", where the chips are essentially planar electronic devices having a plurality of chip leads or traces, laterally projecting therefrom, for electrical interconnection to complementary traces on a planar electronic device, such as a mother board, upon which the socket may be mounted, during testing. The socket comprises a frame member for mounting to the planar electronic device, where the frame member includes electrical means for engaging chip leads and applying electrical current thereto during testing. A second element of the socket is a two-piece, adjustable cover member consisting of first and second members floatably mounted together by plural compression springs, where the first and second members are axially movable relative to one another.

Abstract: This invention is directed to a system for precisely aligning a pair of electronic devices, such as an integrated chip test socket electrically interconnected to a motherboard, where such devices are arranged in a parallel relationship. The system includes a method which comprises the steps of fixedly securing plural projections on a planar surface of each of the devices, where each projection includes a flat side or edge and that the flat side of at least two adjacent projections define a first plane or reference line. Arranging the respective planar surfaces in close proximity to one another whereby the projections from one surface contacts the other planar surface. Thereafter, shifting the respective devices relative to one another until the respective first planes or reference lines are aligned into a common plane or line. Finally the devices are fixedly secured together, whereby the electrical interconnections between the devices are precisely aligned.