Abstract: Materials and objects tagged with wavelength selective particles such as SERS nanotags modified for wavelength selectivity. As used herein, a wavelength selective particle is one which cannot be effectively excited or interrogated at one or more wavelengths where a reporter molecule associated with the particle would normally produce a spectrum. Also disclosed are methods of manufacturing wavelength selective particles and methods of tagging materials or objects with wavelength selective particles.

Abstract: A wrench assembly for turning a central portion of a turnbuckle. The wrench assembly includes first and second wrenches that are substantially identical. Slots in body portions of each of the wrenches define open ends that are oppositely disposed to one another when engaging the central portion of the turnbuckle. The wrenches may be detachably secured together around the central portion of the turnbuckle. At least two spokes extend outwardly from a periphery of each of the body portions of the wrenches that are utilized to impart rotational movement to the central portion of the turnbuckle. In at least one configuration, a distal end of an elongated member is used to push and pull on the spokes to impart the rotational movement.

Abstract: A wrench assembly for turning a central portion of a turnbuckle. The wrench assembly includes first and second wrenches that are substantially identical. Slots in body portions of each of the wrenches define open ends that are oppositely disposed to one another when engaging the central portion of the turnbuckle. The wrenches may be detachably secured together around the central portion of the turnbuckle. At least two spokes extend outwardly from a periphery of each of the body portions of the wrenches that are utilized to impart rotational movement to the central portion of the turnbuckle. In at least one configuration, a distal end of an elongated member is used to push and pull on the spokes to impart the rotational movement.

Abstract: Materials and objects tagged with wavelength selective particles such as SERS nanotags modified for wavelength selectivity. As used herein, a wavelength selective particle is one which cannot be effectively excited or interrogated at one or more wavelengths where a reporter molecule associated with the particle would normally produce a spectrum. Also disclosed are methods of manufacturing wavelength selective particles and methods of tagging materials or objects with wavelength selective particles.

Abstract: A computer-implemented method of identifying timing paths of a circuit block can include representing a circuit block including at least one bypassable component as a block diagram having a plurality of elements linked by nodes. The method can include generating a map file including a text description of each element within the block diagram, wherein the text description of each element specifies a bypass indicator for the element. The method also can include generating a plurality of sub-paths from the map file, determining timing paths from the plurality of sub-paths by selectively combining different ones of the plurality of sub-paths according to commonality of starting points and ending points of the plurality of sub-paths, and outputting the timing paths.

Abstract: A programmable interconnect which closely integrates an independent switching transistor with separate NVM programming and erasing elements. The programming element is an EPROM transistor and the erasing element is a Fowler-Nordheim tunneling device. A unitary floating gate is shared by the switching transistor and the NVM programming and elements which charge and discharge the floating gate. The shared floating gate structure is the memory structure of the integrated programmable interconnect and controls the impedance of the switching transistor.

Abstract: A microcode cache memory is provided on a processor chip for supplying frequently used microcode instruction words to a processor. A bank of multiple Tag-Status RAMs holds addresses of microcode words residing in a bank of Data RAMs. A state machine and a special Least Recently Used Random Access Memory (LRU RAM) operate to maintain the more frequently used words in the Data RAMs so that more hits occur to provide the requested word in one clock cycle. A 90 bit microcode word with 20 fields enables the processor to perform multiple functions simultaneously in parallel.

Abstract: A field programmable device includes two separate and electrically isolated arrays of rows and columns of conductors sharing the same area of an integrated circuit substrate, one array interconnecting memory cells to form a random access memory ("RAM"). The other array forms a full or partial cross-point switching network that is controlled by information stored in memory cells, and/or connects to an operating electronic circuit that is configurable and operable in accordance with information stored in memory cells. In addition, the memory array is easily used to access desired nodes of the circuit array in order to be able to easily observe internal signals during operation. A preferred memory structure is a dynamic random access memory ("DRAM") because of a high density and low cost of existing DRAM fabrication techniques, even though periodic reading and refreshing of the states of the memory cells is required.

Abstract: The present invention provides for an FPGA integrated circuit having an array of logic cells and interconnect lines interconnected by programmable switches, each formed from a nonvolatile memory cell. The logic cell is designed to provide logic or memory functions according to the setting of programmable switches within the cell. The logic cells in the array are interconnectable by a hierarchy of local, long and global wiring segments. The interconnections are made by the setting of programmable switches between the wiring segments.

Abstract: A multi-cache memory system resides on-chip with a system interface to external memory. A general cache memory holds frequently used data and OPCODES for delivery to a processor in one clock cycle. A microcode cache holds frequently used microcode instruction words for delivery to the processor in one clock cycle. Both general and microcode cache memories operate to replace less frequently used OPCODES, data words, and microcode instruction words, with more frequently used words.

Abstract: An entry level data processing system is expandable, with low overhead, by a factor of two to a partitionable upgraded data processing system. This entry level system includes: 1) one system bus, 2) a central processing module (CPM), an input/output module (IOM), and a system control module (SCM)--all of which have one system bus port coupled to the system bus, 3) a memory module coupled via a memory bus to the system control module, and 4) a system expansion interface through which the entry level system is expanded to the upgraded system. In one particular preferred embodiment, the system expansion interface consists of a) a first connector on the SCM for externally connecting to and communicating with the memory bus, b) a second connector on the SCM for externally connecting to and communicating with the system bus, and c) an extension of the system bus through a switch in the SCM and a third connector on the SCM for externally connecting to and communicating with the extended system bus.

Abstract: A keyed, true-transparency combine and keyer receive prioritized image information signals and their corresponding input key signals. On the one hand, others have changed the order of the channels carrying the image signals as the priority of the image signals changes. On the other hand, here we interchange the order of a plurality of substantially identical keyer units within a keyer as the priority of the image signals changes. In interchanging the keyer units, true transparency processed key signals are also generated. In so doing that, the i-th keyer unit modifies the value of its input key signal Bk.sub.i using values of input key signals from higher priority channels. Thereby a true transparency processed key signal Pk.sub.i is generated for the i-th priority channel. In one embodiment, a key-taken signal is generated by multiplying a key-requested signal and a key-available signal while a key-now-available signal is generated by subtracting the key-taken signal from the key-available signal.

Abstract: A semiconductor device that functions as a key to control access to a computer or a software program resident in a computer or provides for secure communications is disclosed. The device executes an algorithm that combines a root and a seed to produce a password. The password is input to the computer. The computer uses an equivalent algorithm to produce a password within the computer. Comparison or other methods are employed to allow access to the computer or computer program or to allow for secure communications. The computer can be coded to produce on a video display thereof a time-space stimulus pattern which can be received by sensors of the key. Alternatively, a keypad can be employed to input the stimulus output from the computer into the access key. Further the present system allows for secure communication using algorithms between different computers and between distant locations.

Abstract: Apparatus and methods are disclosed for defining and controlling the relative positioning of symbols in a computer-based imaging system for generating images suitable for controlling a printing operation. Information describing the symbols is stored in a memory and is retrieved and the corresponding symbol relatively positioned on an imaging device in response to a control program and an input specification of the desired coincidence of "concatenation points" associated with each symbol.