Patents by Inventor Richard D. Wheeler

Richard D. Wheeler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770164
    Abstract: Aspects include performing validation of a soft post-package repair (sPPR) function of a memory device by writing a first pattern to a first target row of a bank group of the memory device, executing the sPPR function on the first target row to change a mapping of the first target row to a spare row and divert a subsequent memory access request targeting the first target row to the spare row. A second pattern is written to the first target row. The sPPR function is executed on a second target row of the bank group to change a mapping of the second target row to the spare row and restore the mapping of the first target row. The first target row is read to confirm the first pattern. The second target row is read to confirm the second pattern and remapping of the second target row to the spare row.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: September 8, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Devon Baughen, Richard D. Wheeler
  • Patent number: 10606696
    Abstract: An aspect includes generating, within a first memory device of a memory system, a plurality of event-based information associated with activity in the memory system. The event-based information is stored in a reserved portion of the first memory device. The event-based information is provided to a memory controller of the memory system corresponding with an access of a memory row across a plurality of memory devices of the memory system associated with the event-based information.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: March 31, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David D. Cadigan, Stephen Glancy, Frank LaPietra, Kevin McIlvain, Jeremy R. Neaton, Richard D. Wheeler
  • Publication number: 20190171520
    Abstract: An aspect includes generating, within a first memory device of a memory system, a plurality of event-based information associated with activity in the memory system. The event-based information is stored in a reserved portion of the first memory device. The event-based information is provided to a memory controller of the memory system corresponding with an access of a memory row across a plurality of memory devices of the memory system associated with the event-based information.
    Type: Application
    Filed: December 4, 2017
    Publication date: June 6, 2019
    Inventors: David D. Cadigan, Stephen Glancy, Frank LaPietra, Kevin McIlvain, Jeremy R. Neaton, Richard D. Wheeler
  • Patent number: 10261856
    Abstract: An aspect includes providing communication links from a memory controller to contents of a plurality of bit locations in a plurality of memory devices. A failing bit location in the plurality of bit locations is detected by the memory controller. A replacement bit location for the failing bit location is selected and a replacement communication link to the replacement bit location is provided by the memory controller. A request to access contents of the failing bit location received after the selecting and providing the replacement communication link is performed by accessing contents of the replacement bit location via the replacement communication link.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: April 16, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen P. Glancy, Frank LaPietra, Kevin M. Mcilvain, Jeremy R Neaton, Richard D. Wheeler
  • Publication number: 20180129554
    Abstract: An aspect includes providing communication links from a memory controller to contents of a plurality of bit locations in a plurality of memory devices. A failing bit location in the plurality of bit locations is detected by the memory controller. A replacement bit location for the failing bit location is selected and a replacement communication link to the replacement bit location is provided by the memory controller. A request to access contents of the failing bit location received after the selecting and providing the replacement communication link is performed by accessing contents of the replacement bit location via the replacement communication link.
    Type: Application
    Filed: November 4, 2016
    Publication date: May 10, 2018
    Inventors: Stephen P. Glancy, Frank LaPietra, Kevin M. Mcilvain, Jeremy R. Neaton, Richard D. Wheeler
  • Patent number: 6618942
    Abstract: A method for insertion of inserting printed circuit card into socket connectors which prevents sockets from getting contaminated or damaged during the insertion of a printed circuit card comprises the steps of: inserting a cam for moving a socket connector's contacts outwardly so that they will not make contact with a card's edge when it is inserted between the contacts of the sockets connector as it is inserted, and after the printed circuit card is inserted the printed circuit card moving the printed circuit card until it makes contact with a stop in the socket connector, and after the printed circuit card has contacted the stop in the socket connector, moving the cam to a closed position allowing the printed circuit card to be seated, and seating the printed circuit card by moving it to cause and allow for an amount of wipe to clean the connector's contacts without contaminating or damaging the socket connector's contacts during the insertion of said printed circuit card.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: September 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Brian S. Beaman, Scott J. Hadderman, Richard D. Wheeler
  • Publication number: 20030066189
    Abstract: A method for insertion of inserting printed circuit card into socket connectors which prevents sockets from getting contaminated or damaged during the insertion of a printed circuit card comprises the steps of:
    Type: Application
    Filed: October 4, 2001
    Publication date: April 10, 2003
    Applicant: International Business Machines Corporation
    Inventors: Brian S. Beaman, Scott J. Hadderman, Richard D. Wheeler
  • Patent number: 5535226
    Abstract: In one aspect, a memory device employing device-level error correction tracks the status of the error correction in terms of whether error correction is active or inactive, whether an uncorrectable error beyond the capability of the device-level correction is detected, whether a recovery option from an uncorrectable error is active and whether the recovery option has been reset. In another aspect, a diagnostic method for determining a status for one or more aspects of device-level error correction employed by a memory device is provided. In the diagnostic method, the status is determined for the one or more aspects, a flag is set based on the status, the flag is latched, a diagnostic code is input into the memory device and the latched flag is read.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: July 9, 1996
    Assignee: International Business Machines Corporation
    Inventors: Charles E. Drake, John A. Fifield, Richard D. Wheeler, Barry J. Wolford