Abstract: The invention is part of methods for separating microorganisms from their culture media and aims at solving the low efficiency and high environmental impact of processes for recovering oil-producing microalgae. For this purpose, the invention provides for the application of magnetic nanoparticles of bacterial origin (NMOBs) in processes for isolating microalgae from a cell culture or from a suspension of salt water or an effluent. NMOBs are particularly capable of recovering microalgae from hypersaline suspensions, favoring the use of marine microalgae in the production of oils with potential application in bio-oil and biofuel production processes. In addition to the use of NMOBs, the invention also provides for a process for recovering microalgae based on the addition of NMOBs to the microalgae suspension and subsequent application of external magnetic force.

Abstract: Provided is a food processor and an attachment for a food processor. The attachment having a substantially S-shaped vertical rotational member having an upper end and a lower end, the lower end of the rotational member configured for secure engagement to a base motor. There is also a first blade assembly attached to a lower portion of the rotational member, the first blade assembly having at least one upward-angled blade, and a second blade assembly attached to an upper portion of the rotational member, the second blade assembly having at least one downward-angled blade. The first blade assembly and second blade assembly are disposed along the rotational member such that the first blade assembly and second blade assembly offset one another along the height and width of the housing.

Abstract: A method for fabricating a MOSFET includes forming a source region and a drain region on a surface of a semiconductor substrate, forming a gate region, forming a body diffusion region, forming metal structures, and forming a drift region including an n-type drift structure having a stepped dopant concentration profile with dopant concentrations increasing along a lateral direction from the drain region to the source region of the device.

Abstract: Provided is a food processor and an attachment for a food processor. The attachment having a substantially S-shaped vertical rotational member having an upper end and a lower end, the lower end of the rotational member configured for secure engagement to a base motor. There is also a first blade assembly attached to a lower portion of the rotational member, the first blade assembly having at least one upward-angled blade, and a second blade assembly attached to an upper portion of the rotational member, the second blade assembly having at least one downward-angled blade. The first blade assembly and second blade assembly are disposed along the rotational member such that the first blade assembly and second blade assembly offset one another along the height and width of the housing.

Abstract: A method for fabricating a MOSFET includes forming a source region and a drain region on a surface of a semiconductor substrate, forming a gate region, forming a body diffusion region, forming metal structures, and forming a drift region including an n-type drift structure having a stepped dopant concentration profile with dopant concentrations increasing along a lateral direction from the drain region to the source region of the device.

Abstract: An embodiment of an Ion Sensitive Field Effect Transistor (ISFET) structure includes a substrate, source and drain regions formed within the substrate and spatially separated by a channel region, a gate dielectric and a gate formed over the channel region, multiple conductive structures overlying the surface of the substrate, and one or more protection diode circuits coupled between one or more of the multiple conductive structures and the substrate. The multiple conductive structures include a floating gate structure and a sense plate structure. The floating gate structure is formed over the gate dielectric and includes the gate. The sense plate structure is electrically coupled to the floating gate structure and is configured to sense a concentration of a target ion or molecule in a fluid adjacent to a portion of the sense plate structure.

Abstract: An embodiment of an Ion Sensitive Field Effect Transistor (ISFET) structure includes a substrate, source and drain regions formed within the substrate and spatially separated by a channel region, a gate dielectric and a gate formed over the channel region, multiple conductive structures overlying the surface of the substrate, and one or more protection diode circuits coupled between one or more of the multiple conductive structures and the substrate. The multiple conductive structures include a floating gate structure and a sense plate structure. The floating gate structure is formed over the gate dielectric and includes the gate. The sense plate structure is electrically coupled to the floating gate structure and is configured to sense a concentration of a target ion or molecule in a fluid adjacent to a portion of the sense plate structure.

Abstract: A method of forming a semiconductor component (100) having an active semiconductor device (680) above a passive device (470) includes providing a semiconductor wafer (110) having an upper surface (115), forming a trench (216) in the upper surface of the semiconductor wafer, forming a cavity (317) in the semiconductor wafer below the trench, forming the passive device in the cavity; and forming at least a portion of the active semiconductor device in the semiconductor wafer and above the passive device.

Abstract: Methods and apparatus are provided for a MOSFET (50, 99, 199) exhibiting increased source-drain breakdown voltage (BVdss). Source (S) (70) and drain (D) (76) are spaced apart by a channel (90) underlying a gate (84) and one or more carrier drift spaces (92, 92?) serially located between the channel (90) and the source (70, 70?) or drain (76, 76?). A buried region (96, 96?) of the same conductivity type as the drift space (92, 92?) and the source (70, 70?) or drain (76, 76?) is provided below the drift space (92, 92?), separated therefrom in depth by a narrow gap (94, 94?) and ohmically coupled to the source (70, 70?) or drain (76, 76?). Current flow (110) through the drift space produces a potential difference (Vt) across this gap (94, 94?).

Abstract: A tunable antifuse element (102, 202, 204, 504, 952) and method of fabricating the tunable antifuse element, including a substrate material (101) having an active area (106) formed in a surface, a gate electrode (104) having at least a portion positioned above the active area (106), and a dielectric layer (110) disposed between the gate electrode (104) and the active area (106). The dielectric layer (110) including the fabrication of one of a tunable stepped structure (127). During operation, a voltage applied between the gate electrode (104) and the active area (106) creates a current path through the dielectric layer (110) and a rupture of the dielectric layer (110) in a plurality of rupture regions (130). The dielectric layer (110) is tunable by varying the stepped layer thicknesses and the geometry of the layer.

Abstract: Methods and apparatus are provided for a MOSFET (50, 99, 199) exhibiting increased source-drain breakdown voltage (BVdss). Source (S) (70) and drain (D) (76) are spaced apart by a channel (90) underlying a gate (84) and one or more carrier drift spaces (92, 92?) serially located between the channel (90) and the source (70, 70?) or drain (76, 76?). A buried region (96, 96?) of the same conductivity type as the drift space (92, 92?) and the source (70, 70?) or drain (76, 76?) is provided below the drift space (92, 92?), separated therefrom in depth by a narrow gap (94, 94?) and ohmically coupled to the source (70, 70?) or drain (76, 76?). Current flow (110) through the drift space produces a potential difference (Vt) across this gap (94, 94?).

Abstract: A non-volatile memory bitcell structure is disclosed that includes a dual capacitor structure. A first metal-insulator-metal (MIM) capacitor having a first capacitance value includes a first top plate, a first bottom plate, and a first dielectric disposed in-between the first top plate and the first bottom plate. A second metal-insulator-metal (MIM) capacitor having a second capacitance value includes a second top plate, a second bottom plate, and a second dielectric disposed in-between the second top plate and the second bottom plate. An element of the first MIM capacitor is electrically coupled in common with an element of the second MIM capacitor. In addition, the first capacitance value is greater than the second capacitance value.