Patents by Inventor Richard Forand
Richard Forand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10078363Abstract: An apparatus is provided that includes a microcontroller to facilitate data communication within a system comprising a plurality of peripheral devices, a power manager to put the microcontroller into a sleep state to save power, and an I/O controller to enable communication between two or more particular peripheral devices in the plurality of peripheral devices without involvement of the microcontroller while the microcontroller is in the sleep state. The microcontroller is to wake from the sleep state in response to at least one signal from a component of the system external to the microcontroller and communication between at least some of the plurality of peripheral devices is facilitated using the microcontroller when in an awake state.Type: GrantFiled: January 15, 2016Date of Patent: September 18, 2018Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner D. Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty
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Patent number: 9898880Abstract: A wearable device (“WD”) stores a token after its wearer completes a successful strong authentication on a primary protected device (“primary PD”). Other protected devices (“secondary PDs”) recognize the stored token as representing a strong authentication and grant the user access while the user continues to wear the WD within a “digital leash-length” proximity. The WD constantly monitors whether the user continues to wear the device. Upon sensing that the user has removed the WD, the WD deletes, disables, or invalidates the token, The user must then repeat the strong authentication to gain further access to the protected devices.Type: GrantFiled: September 8, 2014Date of Patent: February 20, 2018Assignee: Intel CorporationInventors: Ramune Nagisetty, Melissa A Cowan, Jason Martin, Richard A Forand, Wen-Ling M Huang, Conor P Cahill
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Publication number: 20160132101Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: January 15, 2016Publication date: May 12, 2016Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner D. Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty
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Patent number: 9305562Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: April 20, 2015Date of Patent: April 5, 2016Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner D. Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty
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Publication number: 20160092665Abstract: An initial authentication of a user, if successful, causes a token to be stored on, and presented from, a wearable device (WD). The WD continually monitors one or more of the wearer's vital signs to confirm that (1) the WD is being worn by a living person rather than an inanimate simulacrum, and (2) the WD is still worn by the same person who underwent the authentication. The token can be read by a token-reader on at least one protected device (PD). If the token is valid, its presentation serves as authentication and the token-reader grants the user access to the PD. If the WD vital-sign signal is interrupted when the user removes the WD, the WD stops presenting the token and can no longer be used to access a PD.Type: ApplicationFiled: September 27, 2014Publication date: March 31, 2016Inventors: Melissa A. Cowan, Ramune Nagisetty, Jason Martin, Richard A. Forand, Conor P. Cahill, Bradley A. Jackson
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Publication number: 20150228290Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: April 20, 2015Publication date: August 13, 2015Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner D. Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty
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Patent number: 9015511Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: August 27, 2013Date of Patent: April 21, 2015Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner D. Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty
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Publication number: 20150070134Abstract: A wearable device (“WD”) stores a token after its wearer completes a successful strong authentication on a primary protected device (“primary PD”). Other protected devices (“secondary PDs”) recognize the stored token as representing a strong authentication and grant the user access while the user continues to wear the WD within a “digital leash-length” proximity. The WD constantly monitors whether the user continues to wear the device. Upon sensing that the user has removed the WD, the WD deletes, disables, or invalidates the token, The user must then repeat the strong authentication to gain further access to the protected devices.Type: ApplicationFiled: September 8, 2014Publication date: March 12, 2015Applicant: INTEL CORPORATIONInventors: Ramune Nagisetty, Melissa A. Cowan, Jason Martin, Richard A. Forand, Wen-Ling M. Huang, Conor P. Cahill
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Publication number: 20130346664Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: August 27, 2013Publication date: December 26, 2013Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 8522063Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: April 24, 2012Date of Patent: August 27, 2013Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Publication number: 20120210036Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: April 24, 2012Publication date: August 16, 2012Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 8166325Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: September 22, 2008Date of Patent: April 24, 2012Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 7774520Abstract: A new audio playback architecture may be used, which allows the use of much larger buffering than that used by a typical audio subsystem in a computing system to improve power efficiency of the system and at the same time allows to maintain the quality (e.g., fidelity and responsiveness) of the audio playback. The audio controller in the new architecture may be made to report back to the host system a more accurate indication of which audio frame is being set to the audio codec than a currently available audio controller does. Additionally, the controller is capable of re-fetching previously buffered (but not yet transmitted) data. Furthermore, buffers in both the audio controller and the main memory may be dynamically adjusted during playback of audio data and/or for different applications.Type: GrantFiled: December 17, 2007Date of Patent: August 10, 2010Assignee: Intel CorporationInventors: Ulf R. Hanebutte, Richard A. Forand, Pradeep Sebestian, Paul S. Diefenbaugh, Jeremy J. Lees, Brent Chartrand
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Patent number: 7590101Abstract: A computer includes a wireless personal area network (WPAN) interface, a wireless local area network (WLAN) interface and a wireless wide area network (WWAN) interface. A device communicating with the wireless personal area network can command the computer to perform actions using the wireless local area network interface or wireless wide area network interface.Type: GrantFiled: March 31, 2004Date of Patent: September 15, 2009Assignee: Intel CorporationInventors: Richard A. Forand, Riley W. Jackson, James P. Kardach
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Publication number: 20090019185Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: September 22, 2008Publication date: January 15, 2009Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 7428650Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: May 15, 2006Date of Patent: September 23, 2008Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 7421597Abstract: A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.Type: GrantFiled: October 28, 2005Date of Patent: September 2, 2008Assignee: Intel CorporationInventors: James P. Kardach, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty, Vivek Gupta, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand
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Patent number: 7406610Abstract: A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.Type: GrantFiled: October 28, 2005Date of Patent: July 29, 2008Assignee: Intel CorporationInventors: James P. Kardach, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty, Vivek Gupta, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand
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Publication number: 20080147918Abstract: A new audio playback architecture may be used, which allows the use of much larger buffering than that used by a typical audio subsystem in a computing system to improve power efficiency of the system and at the same time allows to maintain the quality (e.g., fidelity and responsiveness) of the audio playback. The audio controller in the new architecture may be made to report back to the host system a more accurate indication of which audio frame is being set to the audio codec than a currently available audio controller does. Additionally, the controller is capable of re-fetching previously buffered (but not yet transmitted) data. Furthermore, buffers in both the audio controller and the main memory may be dynamically adjusted during playback of audio data and/or for different applications.Type: ApplicationFiled: December 17, 2007Publication date: June 19, 2008Inventors: Ulf R. Hanebutte, Richard A. Forand, Pradeep Sebestian, Paul S. Diefenbaugh, Jeremy J. Lees, Brent Chartrand
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Patent number: 7254730Abstract: A method and apparatus for a user to interface with a mobile computing device is disclosed.Type: GrantFiled: February 14, 2003Date of Patent: August 7, 2007Assignee: Intel CorporationInventors: James Kardach, Jeffrey Huckins, Kristoffer Fleming, Brian Belmont, Pochang Hsu, Venu Kuchibhotla, Richard Forand, Uma Gadamsetty, Gunner Danneels