Abstract: A system for detecting and reporting memory errors in error correctable memory in a computer system includes a chipset that utilizes the error correctable memory for creating an error detection signal when a memory error occurs. The error detection signal includes data that may be utilized to identify the error correctable memory having a memory error. The system further includes a motherboard having two or more memory interface slots, where the error correctable memory is coupled with at least one of the interface slots, and each of the at least one slots has a unique slot identification number. The chipset is coupled to the motherboard, and the system further includes a driver coupled to the chipset. The motherboard has at least one register that receives the error detection signal and stores the data in the error detection signal in the at least one register.