Patents by Inventor Richard J. Giacchino

Richard J. Giacchino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9048840
    Abstract: An integrated circuit including a first circuit, a second circuit, a third circuit, a first complementary pair of transistors, and a second complementary pair of transistors. The first circuit may be configured to generate a first input signal in response to a first control input signal. The second circuit may be configured to generate a first output signal and a second output signal in response to the first input signal and a bias signal. The third circuit may be configured to generate the bias signal in response to a bias input signal. The first complementary pair of transistors may be configured to drive a first series output of the integrated circuit in response to the first output signal. The second complementary pair of transistors may be configured to drive a first shunt output of the integrated circuit in response to the second output signal.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: June 2, 2015
    Assignee: M/A-COM Technology Solutions Holdings, Inc.
    Inventors: Chengxin Liu, Christopher D. Weigand, Richard J. Giacchino, Scott Vasquez
  • Publication number: 20130049818
    Abstract: An integrated circuit including a first circuit, a second circuit, a third circuit, a first complementary pair of transistors, and a second complementary pair of transistors. The first circuit may be configured to generate a first input signal in response to a first control input signal. The second circuit may be configured to generate a first output signal and a second output signal in response to the first input signal and a bias signal. The third circuit may be configured to generate the bias signal in response to a bias input signal. The first complementary pair of transistors may be configured to drive a first series output of the integrated circuit in response to the first output signal. The second complementary pair of transistors may be configured to drive a first shunt output of the integrated circuit in response to the second output signal.
    Type: Application
    Filed: December 20, 2011
    Publication date: February 28, 2013
    Inventors: Chengxin Liu, Christopher D. Weigand, Richard J. Giacchino, Scott Vasquez
  • Patent number: 6903447
    Abstract: An integrated circuit package houses and connects to a die to form an integrated circuit with internal matching. The package comprises a lead frame comprising at least one transmission line, a die paddle, and at least one input lead and at least one output lead. Bond wires connect select locations along the at least one transmission line to ground through impedance matching circuit components located within the integrated circuit to provide an impedance matching network associated with at least one of the output leads. The package may also substantially encapsulate the lead frame, while exposing the die paddle and the input/output leads.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: June 7, 2005
    Assignee: M/A-Com, Inc.
    Inventors: Norbert A. Schmitz, Richard J. Giacchino, Wayne M. Struble
  • Patent number: 6828658
    Abstract: An integrated circuit package houses and connects to a die to form an integrated circuit with internal matching. The package comprises a lead frame comprising at least one transmission line, a die paddle, and at least one input lead and at least one output lead. Bond wires connect select locations along the at least one transmission line to ground through impedance matching circuit components located within the integrated circuit to provide an impedance matching network associated with at least one of the output leads. A plastic mold compound substantially encases the lead frame, while exposing the die paddle and the input/output leads. Incorporating the transmission line into the lead-frame avoids having to place the matching network outside of the integrated circuit package. That is, etching the lead frame to provide the transmission line, and placing components (e.g., capacitors, inductors, etc.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: December 7, 2004
    Assignee: M/A-Com, Inc.
    Inventors: Norbert A. Schmitz, Richard J. Giacchino, Wayne Struble
  • Publication number: 20040026766
    Abstract: An integrated circuit package houses and connects to a die to form an integrated circuit with internal matching. The package comprises a lead frame comprising at least one transmission line, a die paddle, and at least one input lead and at least one output lead. Bond wires connect select locations along the at least one transmission line to ground through impedance matching circuit components located within the integrated circuit to provide an impedance matching network associated with at least one of the output leads. The package may also substantially encapsulate the lead frame, while exposing the die paddle and the input/output leads.
    Type: Application
    Filed: May 1, 2003
    Publication date: February 12, 2004
    Inventors: Norbert A. Schmitz, Richard J. Giacchino, Wayne M. Struble
  • Publication number: 20030209784
    Abstract: An integrated circuit package houses and connects to a die to form an integrated circuit with internal matching. The package comprises a lead frame comprising at least one transmission line, a die paddle, and at least one input lead and at least one output lead. Bond wires connect select locations along the at least one transmission line to ground through impedance matching circuit components located within the integrated circuit to provide an impedance matching network associated with at least one of the output leads. A plastic mold compound substantially encases the lead frame, while exposing the die paddle and the input/output leads. Incorporating the transmission line into the lead-frame avoids having to place the matching network outside of the integrated circuit package. That is, etching the lead frame to provide the transmission line, and placing components (e.g., capacitors, inductors, etc.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 13, 2003
    Inventors: Norbert A. Schmitz, Richard J. Giacchino, Wayne Struble