Abstract: A bunker system for shielding radiation emitted from a radiation treatment device includes a multi-core wall structure that completely surrounds the radiation treatment device. The wall structure includes a cast-in-place concrete inner core of limited thickness in order to minimize curing time requirements. The inner core is immediately surrounded by an outer core constructed from a plurality of preformed modular blocks. Each modular block is constructed of a radiation shielding material, such as concrete. As part of the assembly process, the preformed modular blocks are designed to be stacked top-to-bottom and side-by-side in an interlocking fashion to form a continuous wall structure, with blocks additionally arranged in a front-to-back relationship to achieve the required outer core thickness. The dual-core construction of the wall structure enables the bunker system to be quickly and efficiently assembled with enhanced quality control and potential reusability.

Abstract: A process is provided for creating an input/output (I/O) model. A set of logical I/O pins of an unplaced and unrouted circuit design is determined. Pin placement is determined for one or more of the logical I/O pins on device pins of a target device. An I/O pin profile for each of the logical I/O pins is determined. A plurality of I/O pin models available on the target device are input and an I/O pin model is selected from the plurality of I/O pin models for each of the logical I/O pins according to the respective I/O pin profiles. An I/O model is generated including each selected I/O pin model within the I/O model. The generated I/O model is stored in a processor readable storage medium.

Abstract: A method of partially reconfiguring an IC having programmable modules that includes the steps of reading a frame of configuration information from the configuration memory array; modifying at least part of the configuration information, thereby creating a modified frame of configuration information; and overwriting the existing frame of configuration information in the configuration memory array with the modified frame, thereby partially reconfiguring the IC.

Abstract: A method of partially reconfiguring an IC having programmable modules that includes the steps of reading a frame of configuration information from the configuration memory array; modifying at least part of the configuration information, thereby creating a modified frame of configuration information; and overwriting the existing frame of configuration information in the configuration memory array with the modified frame, thereby partially reconfiguring the IC.

Abstract: A programmable logic device, such as a field programmable gate array, is partially reconfigured using a read-modify-write scheme that is controlled by a processor. The partial reconfiguration includes (1) loading a base set of configuration data values into a configuration memory array of the programmable logic device, thereby configuring the programmable logic device; (2) reading a first frame of configuration data values from the configuration memory array; (3) modifying a subset of the configuration data values in the first frame of configuration data values, thereby creating a first modified frame of configuration data values; and (4) overwriting the first frame of configuration data values in the configuration memory array with the first modified frame of configuration data values, thereby partially reconfiguring the programmable logic device. The steps of reading, modifying and overwriting are performed under the control of a processor.

Abstract: A programmable logic device, such as a field programmable gate array, is partially reconfigured using a read-modify-write scheme that is controlled by a processor. The partial reconfiguration includes (1) loading a base set of configuration data values into a configuration memory array of the programmable logic device, thereby configuring the programmable logic device; (2) reading a first frame of configuration data values from the configuration memory array; (3) modifying a subset of the configuration data values in the first frame of configuration data values, thereby creating a first modified frame of configuration data values; and (4) overwriting the first frame of configuration data values in the configuration memory array with the first modified frame of configuration data values, thereby partially reconfiguring the programmable logic device. The steps of reading, modifying and overwriting are performed under the control of a processor.

Abstract: A method of partially reconfiguring an IC having programmable modules that includes the steps of reading a frame of configuration information from the configuration memory array; modifying at least part of the configuration information, thereby creating a modified frame of configuration information; and overwriting the existing frame of configuration information in the configuration memory array with the modified frame, thereby partially reconfiguring the IC.

Abstract: An automatic door operator with a motor connectable to a door through gear units and linkages and for moving the door between an open and a closed position. An absolute position transducer measures the absolute position of the door independently of previous positions of the door and substantially continuously. A control senses an external signal indicating one of a desired open state and closed state of the door. The control compares the absolute position of the door with the external signal and generates the drive signal to drive the motor to cause the absolute position to be substantially identical to the external signal. The motor is a regenerative drive operatable in all directional combinations of electrical driving torque and motor rotation. The control electrically drives the regenerative drive in a direction opposite a rotation of the regenerative drive to brake a load applied to the motor. The control also limits the current to the motor, to limit the force the motor applies to the door.