Abstract: An efficient method of amplifying a digital signal with reduced electromagnetic interference is disclosed. The invention applies an average amplitude detector to the input signal to control the clock frequency of a pseudo-random number generator so that the clock signal decreases when the average amplitude of the signal increases. The input signal and the pseudo-random number generator are compared to generate a control signal for a switching power amplifier followed by a low-pass filter. When the average amplitude of the input signal falls below a pre-determine threshold, the switching amplifier is placed in a sleep mode.

Abstract: An efficient method of amplifying a digital signal with reduced electromagnetic interference is disclosed. The invention applies an average amplitude detector to the input signal to control the clock frequency of a pseudo-random number generator so that the clock signal decreases when the average amplitude of the signal increases. The input signal and the pseudo-random number generator are compared to generate a control signal for a switching power amplifier followed by a low-pass filter. When the average amplitude of the input signal falls below a pre-determine threshold, the switching amplifier is placed in a sleep mode.

Abstract: A novel majority logic circuit is disclosed to determine whether the majority of the inputs are a one, within a constant number of clock cycles, regardless of the number of inputs. The majority logic circuit according to the present invention includes a plurality of current mirror stages and an amplifier stage. For each input, one current mirror stage is used, which outputs either a current source if the input is a one, or a current sink if the input is a zero. The current sources of all the input current mirror stages are connected in parallel to the current source input node of the amplifier stage. The current sinks of all the input current mirror stages are connected in parallel to the current sink input node of the amplifier stage. The amplifier is a differential type, which outputs either a positive voltage or a zero voltage depending upon the majority of the inputs.

Abstract: The present invention is a method of obtaining a time history of a signal without having to integrate information on magnitude versus time and phase versus time by separately displaying sets of real and imaginary components of a signal verses time, including the steps of sampling the signal in time, where each time sample of the signal is described by a real and imaginary component; selecting a size of a display on a screen; determining the real and imaginary components for each time sample of the signal; selecting a user-definable number of samples to be displayed at any one instance; and displaying each time sample according to its real component along the X-axis, the imaginary component along the Y-axis, and the time associated with the time sample along the Z-axis.