Patents by Inventor Richard K. Spielberger
Richard K. Spielberger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7863720Abstract: A method and system for stacking integrated circuits is described. An integrated circuit stack is formed by stacking integrated circuit pairs. The integrated circuit pairs are formed by connecting an active surface of a first integrated circuit to an active surface of a second integrated circuit using flip chip bonding. The first integrated circuit pair is connected to a substrate using an adhesive. The other integrated circuit pairs are stacked sequentially on the first integrated circuit pair using an adhesive. Wire bonding is used to connect the second integrated circuit in each of the integrated circuit pairs to the substrate.Type: GrantFiled: May 24, 2004Date of Patent: January 4, 2011Assignee: Honeywell International Inc.Inventors: Ronald J. Jensen, Richard K. Spielberger
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Patent number: 7736946Abstract: A method for assembling a hermetically sealed package to contain a MEMS die and the hermetically sealed package are presented. The method includes selectively applying a glass mixture to a dome. The dome is heated to a first temperature sufficient to flow the glass mixture. The dome is pressed into contact with a carrier containing the MEMS device, the pressing being maintained at a pressure and for a temporal interval sufficient to flow the glass mixture onto the carrier. The dome is cooled while maintaining contact with the carrier, to a second temperature sufficient to allow the glass mixture to harden into a glass frit thereby to seal the carrier to the dome. The glass frit has a seal width.Type: GrantFiled: February 7, 2007Date of Patent: June 15, 2010Assignee: Honeywell International Inc.Inventors: Bryan R. Seppala, Harlan L. Curtis, Jon B. DCamp, Richard K. Spielberger
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Patent number: 7635916Abstract: An IC package that employs top-side conduction cooling. The IC package has a low thermal resistance between a substrate housed within the package and the lid of the package. Thermal resistance is decreased by increasing the conduction cross-sections laterally through the package and lid and vertically from the package into the lid. The lid may also be modified with an extended mesa portion that reduces the gap between the lid and the IC. A thermally conductive spacer may also be interposed between the IC and the lid. Also, the package housing body and lid may be made from high thermal conductivity materials having thermal conductivities of 50 W/mK or greater with matching CTE between the lid and the package.Type: GrantFiled: March 23, 2007Date of Patent: December 22, 2009Assignee: Honeywell International Inc.Inventors: Ronald J. Jensen, Richard K. Spielberger
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Patent number: 7569915Abstract: A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield is affixed directly to a surface of semiconductor die containing an integrated circuit structure.Type: GrantFiled: June 26, 2006Date of Patent: August 4, 2009Assignee: Micron Technology, Inc.Inventors: Richard K. Spielberger, Romney R. Katti
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Publication number: 20080272482Abstract: An IC package that employs top-side conduction cooling. The IC package has a low thermal resistance between a substrate housed within the package and the lid of the package. Thermal resistance is decreased by increasing the conduction cross-sections laterally through the package and lid and vertically from the package into the lid. The lid may also be modified with an extended mesa portion that reduces the gap between the lid and the IC. A thermally conductive spacer may also be interposed between the IC and the lid. Also, the package housing body and lid may be made from high thermal conductivity materials having thermal conductivities of 50 W/mK or greater with matching CTE between the lid and the package.Type: ApplicationFiled: March 23, 2007Publication date: November 6, 2008Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Ronald J. Jensen, Richard K. Spielberger
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Publication number: 20080188035Abstract: A method for assembling a hermetically sealed package to contain a MEMS die and the hermetically sealed package are presented. The method includes selectively applying a glass mixture to a dome. The dome is heated to a first temperature sufficient to flow the glass mixture. The dome is pressed into contact with a carrier containing the MEMS device, the pressing being maintained at a pressure and for a temporal interval sufficient to flow the glass mixture onto the carrier. The dome is cooled while maintaining contact with the carrier, to a second temperature sufficient to allow the glass mixture to harden into a glass frit thereby to seal the carrier to the dome. The glass frit has a seal width.Type: ApplicationFiled: February 7, 2007Publication date: August 7, 2008Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Bryan R. Seppala, Harlan L. Curtis, Jon B. DCamp, Richard K. Spielberger
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Patent number: 7078243Abstract: A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield is affixed directly to a surface of semiconductor die containing an integrated circuit structure.Type: GrantFiled: October 26, 2004Date of Patent: July 18, 2006Assignee: Micron Technology, Inc.Inventors: Richard K. Spielberger, Romney R. Katti
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Patent number: 6916668Abstract: A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield of relatively high permeability is affixed directly to a surface of semiconductor die containing an integrated circuit structure with magnetoresistive memory cells.Type: GrantFiled: December 6, 2002Date of Patent: July 12, 2005Assignee: Micron Technology, Inc.Inventors: Richard K. Spielberger, Romney R. Katti
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Patent number: 6657134Abstract: A ball grid array mounted circuit includes a stress relief substrate having spaced conductive vias extending between its surfaces and connection pads at the surfaces. Solder connections formed from solder balls connect between pads at the top surface and connection pads at an electronic component. Solder connections formed from solder balls connect between pads at the bottom surface and connection pads at a printed circuit board (PCB). The solder connections absorb at least a portion of the stress due to differences between the thermal coefficient of expansion of the electronic component and the PCB.Type: GrantFiled: November 30, 2001Date of Patent: December 2, 2003Assignee: Honeywell International Inc.Inventors: Richard K. Spielberger, Ronald J. Jensen, Thomas G. Wagner
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Patent number: 6611054Abstract: An integrated circuit package for use in radiation environments includes a base for receiving an integrated circuit die and has a peripheral surface for receiving a lid. The lid has an inner surface facing the die that has a cladding of a low atomic number material to limit electron emission due to absorbed radiation.Type: GrantFiled: December 22, 1993Date of Patent: August 26, 2003Assignee: Honeywell Inc.Inventors: Thomas J. Dunaway, Richard K. Spielberger
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Publication number: 20030102156Abstract: A ball grid array mounted circuit includes a stress relief substrate having spaced conductive vias extending between its surfaces and connection pads at the surfaces. Solder connections formed from solder balls connect between pads at the top surface and connection pads at an electronic component. Solder connections formed from solder balls connect between pads at the bottom surface and connection pads at a printed circuit board (PCB). The solder connections absorb at least a portion of the stress due to differences between the thermal coefficient of expansion of the electronic component and the PCB.Type: ApplicationFiled: November 30, 2001Publication date: June 5, 2003Inventors: Richard K. Spielberger, Ronald J. Jensen, Thomas G. Wagner
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Publication number: 20030098469Abstract: A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield is affixed directly to a surface of semiconductor die containing an integrated circuit structure.Type: ApplicationFiled: December 6, 2002Publication date: May 29, 2003Applicant: Micron Technology, Inc.Inventors: Richard K. Spielberger, Romney R. Katti
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Patent number: 6515352Abstract: A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield is affixed directly to a surface of semiconductor die containing an integrated circuit structure.Type: GrantFiled: September 25, 2000Date of Patent: February 4, 2003Assignee: Micron Technology, Inc.Inventors: Richard K. Spielberger, Romney R. Katti
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Patent number: 6169254Abstract: Apparatus for mounting and making electrical connections to sensor devices for use in three axis sensing including a flexible circuit and a substrate shaped so that when a portion of the flexible tape is secured to the substrate the sensor devices can be mounted on the substrate for sensing in the desired three directions. The sensors are connected to conductors in the flexible tape by wirebonds or by other means.Type: GrantFiled: July 20, 1994Date of Patent: January 2, 2001Assignee: Honeywell, Inc.Inventors: Bharat B. Pant, Richard K. Spielberger
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Patent number: 6027948Abstract: A method for performing an elevated temperature process on an integrated device whereby a magnetic field is used to maintain the alignment of magnetic domains in magnetically sensitive materials.Type: GrantFiled: September 30, 1997Date of Patent: February 22, 2000Assignee: Honeywell International Inc.Inventors: Ronald J. Jensen, Richard K. Spielberger, Allan T. Hurst, Jeff Sather
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Patent number: 6005778Abstract: Chip stacking and capacitor mounting arrangement including a planar spacer separating a first die and a second die. A conductive spacer provides for backside chip grounding in one application and provides for capacitor mounting in another application.Type: GrantFiled: July 29, 1996Date of Patent: December 21, 1999Assignee: Honeywell Inc.Inventors: Richard K. Spielberger, Ronald J. Jensen, Charles J. Speerschneider
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Patent number: 5998867Abstract: A shielding apparatus for an electronic component includes a first insulative encapsulant surrounding at least a portion of the component and a second encapsulant surrounding said first encapsulant and having conductive particles dispersed therein for absorbing ionizing radiation.Type: GrantFiled: February 23, 1996Date of Patent: December 7, 1999Assignee: Honeywell Inc.Inventors: Ronald J. Jensen, Richard K. Spielberger, Toan Dinh Nguyen, William F. Jacobsen
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Patent number: 5939772Abstract: A package for shielding a circuit containing magnetically sensitive materials from external magnetic fields. A shield attached to a base of the package is connected by vias to a first conductive plane. A shield attached to a lid of the package is connected by vias to a second conductive plane. The first shield and the second shield are electrically interconnected. Conductive leads extend from the package and are connected internally to the circuit.Type: GrantFiled: October 31, 1997Date of Patent: August 17, 1999Assignee: Honeywell Inc.Inventors: Allan T. Hurst, Richard K. Spielberger
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Patent number: 5891745Abstract: A process of providing a bond pad arrangement for use with a thermocompression wire bonder including a primary bond pad for connection of an integrated circuit during a production assembly process, and a secondary test bond pad contiguous with the primary bond pad for connection of a wire to the integrated circuit. Including performing a test sequence, and removing the wire from the secondary test bond pad.Type: GrantFiled: October 7, 1997Date of Patent: April 6, 1999Assignee: Honeywell Inc.Inventors: Thomas J. Dunaway, Richard K. Spielberger
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Patent number: 5719748Abstract: A semiconductor package including a base having a chip receiving portion and a surrounding portion; a bridge having conductive strips extending over the chip and supported at the surrounding portion; wires connect the conductive strips to power and ground; and wires connect the conductive strips to chip area power and ground bonding pads. Decoupling capacitors may be mounted on the base.Type: GrantFiled: June 28, 1995Date of Patent: February 17, 1998Assignee: Honeywell Inc.Inventors: Deborah A. Cullinan, Thomas J. Dunaway, Richard K. Spielberger