Patents by Inventor Richard K. Trueblood

Richard K. Trueblood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4454528
    Abstract: To provide an electrically conductive p-type wafer backside for semiconductor integrated circuit chips (die), a process is provided consisting of applying a thin layer of aluminum on a silicon dioxide free surface of the chip, followed by a layer of gold, then alloying the metals to diffuse the gold and traces of aluminum into the chip surface. The surface thus prepared can then be advantageously die attachable to a receiving surface by either eutectic alloy or conductive polymer techniques.
    Type: Grant
    Filed: January 24, 1983
    Date of Patent: June 12, 1984
    Assignee: Zilog, Inc.
    Inventor: Richard K. Trueblood
  • Patent number: 4326214
    Abstract: A hermetically sealed thermal shock resistant ultraviolet light responsive read only semiconductor chip package includes a pair of mating ceramic members one of which mounts an ultraviolet sensitive semiconductor chip and the other which provides a window having an ultraviolet light transmitting glass sealingly mounted therein. The ultraviolet responsive chip is hermetically packaged by selecting a ceramic base member and a mating ceramic cap member, mounting an ultraviolet sensitive chip on the base and forming an ultraviolet transmitting window in the cap member and thereafter mating and sealing the members together so that the window covers the chip for permitting the transmission of ultraviolet rays thereto.
    Type: Grant
    Filed: April 24, 1978
    Date of Patent: April 20, 1982
    Assignee: National Semiconductor Corporation
    Inventor: Richard K. Trueblood
  • Patent number: 4293587
    Abstract: To provide an electrically conductive p-type wafer backside for semiconductor integrated circuit chips (die), a process is provided consisting of applying a thin layer of aluminum on a silicon dioxide free surface of the chip, followed by a layer of gold, then alloying the metals to diffuse the gold and traces of aluminum into the chip surface. The surface thus prepared can then be advantageously die attachable to a receiving surface by either eutectic alloy or conductive polymer techniques.
    Type: Grant
    Filed: November 9, 1978
    Date of Patent: October 6, 1981
    Assignee: Zilog, Inc.
    Inventor: Richard K. Trueblood