Patents by Inventor Richard Lane

Richard Lane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070156568
    Abstract: A method for enforcement of trading limits for groups of traders. Each trader's workstation periodically transmits information on the trader's outstanding and executed orders to a risk management workstation. The risk management workstation aggregates this information for the traders in the group and returns this global information periodically to each trader's workstation. When a trader wishes to transmit an order to buy or sell a commodity to an exchange, the trader's workstation determines whether the trade will cause trading limit thresholds to be exceeded, based on the updated information at the trader's workstation. If trading limits would be exceeded, the trader's workstation prevents submission of the order. If trading limits are met, the workstation submits the trade order to the exchange. Thus, bottlenecks caused by centralized trading limit enforcement techniques may be avoided.
    Type: Application
    Filed: January 5, 2006
    Publication date: July 5, 2007
    Inventors: Vladan Jovanovic, Richard Lane, Veselin Stanic, Adnan Beganovic
  • Publication number: 20070117347
    Abstract: The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.
    Type: Application
    Filed: January 17, 2007
    Publication date: May 24, 2007
    Inventors: Hongmei Wang, Fred Fishburn, Janos Fucsko, T. Allen, Richard Lane, Robert Hanson, Kevin Shea
  • Publication number: 20070061233
    Abstract: A method for trading securities. A trader generates a variable derivative product order that identifies at least a derivative product, an underlying financial product or instrument, a pricing formula, and values of price determination variables needed by the pricing formula to establish a price for the derivative. The variable product order is transmitted electronically to an exchange. The exchange calculates the offered price of the derivative using a value of the underlying product and publishes offers to potential traders. The offered price is recalculated as the value of the underlying products changes and republished to potential traders. Trades may then be executed based on the offered prices. Hedging trades may be executed in combination with trades made based on the variable derivative product orders.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 15, 2007
    Inventors: Vladan Jovanovic, Veselin Stanic, Richard Lane, Adnan Beganovic
  • Publication number: 20070061241
    Abstract: A method for trading securities including options. A trader generates a variable derivative product order that identifies at least a derivative product, an underlying financial product or instrument, a pricing formula, and values of price determination variables needed by the pricing formula to establish a price for the derivative. The variable product order is transmitted electronically to an exchange. The exchange calculates the offered price of the derivative using a value of the underlying product and publishes offers to potential traders. The offered price is recalculated as the value of the underlying products changes and republished to potential traders. Trades may then be executed based on the offered prices. Hedging trades may be executed in combination with trades made based on the variable derivative product orders.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 15, 2007
    Inventors: Vladan Jovanovic, Veselin Stanic, Richard Lane, Adnan Beganovic
  • Publication number: 20070020939
    Abstract: Methods for forming accurate, symmetric cross-section spacers of hardmask material on a substrate such as a silicon wafer or quartz substrate, for formation of precise subresolution features useful for forming integrated circuits. The resulting symmetrical hardmask spacers with their symmetric upper portions may be used to accurately etch well-defined, high aspect ratio features in the underlying substrate. Some disclosed methods also enable simultaneous formation of hardmask structures of various dimensions, of both conventional and subresolution size, to enable etching structural features of different sizes in the underlying substrate.
    Type: Application
    Filed: September 19, 2006
    Publication date: January 25, 2007
    Inventors: Richard Lane, Fred Fishburn
  • Publication number: 20060292838
    Abstract: An ion implanting method includes forming a pair of spaced and adjacent features projecting outwardly from a substrate. At least outermost portions of the pair of spaced features are laterally pulled away from one another with a patterned photoresist layer received over the features and which has an opening therein received intermediate the pair of spaced features. While such spaced features are laterally pulled, a species is ion implanted into substrate material which is received lower than the pair of spaced features. After the ion implanting, the patterned photoresist layer is removed from the substrate. Other aspects and implementations are contemplated.
    Type: Application
    Filed: June 28, 2005
    Publication date: December 28, 2006
    Inventors: Randall Culver, Terrence McDaniel, Hongmei Wang, James Dale, Richard Lane, Fred Fishburn
  • Publication number: 20060292787
    Abstract: The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.
    Type: Application
    Filed: June 28, 2005
    Publication date: December 28, 2006
    Inventors: Hongmei Wang, Fred Fishburn, Janos Fucsko, T. Allen, Richard Lane, Robert Hanson, Kevin Shea
  • Patent number: 7146185
    Abstract: A wireless transmission system for multimedia information having plural layers includes a base station (BTS) and a mobile station (MS) that can select which layers to transmit based on reported channel conditions, mobile location, and/or forward error correction (FEC) used for a particular layer. A respective FEC rate and/or power level can be dynamically established for each layer by a mobile station dependent on available bandwidth and/or reception and decoding capability of the BTS.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: December 5, 2006
    Inventor: Richard Lane
  • Publication number: 20060263596
    Abstract: A PSA laminate is provided comprising: a) at least one outer filmic layer (A) comprising at least one filmic polymer; b) at least one adhesive base layer (B) comprising at least one adhesive base polymer; and c) at least one tackifier layer (C) comprising at least one tackifier and at least one polymer; wherein the pressure sensitive adhesive laminate is obtainable by co-extruding the outer filmic layer (A) with the adhesive base layer (B) to produce a non-adhesive laminate and applying the tackifier layer (C) to the adhesive base layer side of the non-adhesive laminate to produce the PSA laminate. Processes for producing the PSA laminate, and articles comprising the PSA laminate are also provided.
    Type: Application
    Filed: April 4, 2006
    Publication date: November 23, 2006
    Inventors: Derek Bamborough, Richard Lane, Magdalena Kirchner-Paree, Willem Stevels, Daniel Klosiewicz, Roelof Luth
  • Publication number: 20060251888
    Abstract: A PSA laminate is provided comprising: a) at least one outer filmic layer (A) comprising at least one filmic polymer; b) at least one adhesive base layer (B) comprising at least one adhesive base polymer; and c) at least one tackifier layer (C) comprising at least one tackifier and at least one polymer; wherein the pressure sensitive adhesive laminate is obtainable by co-extruding the outer filmic layer (A) with the adhesive base layer (B) to produce a non-adhesive laminate and applying the tackifier layer (C) to the non-adhesive laminate to produce the PSA laminate.
    Type: Application
    Filed: July 11, 2005
    Publication date: November 9, 2006
    Inventors: Richard Lane, Derek Bamborough, Roelof Luth, Daniel Klosiewicz
  • Publication number: 20060251890
    Abstract: A PSA laminate is provided comprising: a) at least one outer filmic layer (A) comprising at least one filmic polymer; b) at least one adhesive base layer (B) comprising at least one adhesive base polymer; and c) at least one tackifier layer (C) comprising at least one tackifier; wherein the pressure sensitive adhesive laminate is obtainable by co-extruding the outer filmic layer (A) with the adhesive base layer (B) to produce a non-adhesive laminate and applying the tackifier layer (C) to the adhesive base layer side of the non-adhesive laminate to produce the PSA laminate.
    Type: Application
    Filed: April 4, 2006
    Publication date: November 9, 2006
    Inventors: Richard Lane, Derek Bamborough, Magdalena Elizabeth Kirchner-Paree, Willem Stevels, Daniel Klosiewicz, Roelof Luth
  • Publication number: 20060251889
    Abstract: A PSA laminate is provided comprising: a) at least one outer filmic layer (A) comprising at least one filmic polymer; b) at least one adhesive base layer (B) comprising at least one adhesive base polymer; and c) at least one tackifier layer (C) comprising at least one tackifier; wherein the pressure sensitive adhesive laminate is obtainable by co-extruding the outer filmic layer (A) with the adhesive base layer (B) to produce a non-adhesive laminate and applying the tackifier layer (C) to the non-adhesive laminate to produce the PSA laminate.
    Type: Application
    Filed: July 11, 2005
    Publication date: November 9, 2006
    Inventors: Richard Lane, Derek Bamborough, Roelof Luth, Daniel Klosiewicz
  • Publication number: 20060234469
    Abstract: In one aspect, the invention includes an isolation region forming method comprising: a) forming an oxide layer over a substrate; b) forming a nitride layer over the oxide layer, the nitride layer and oxide layer having a pattern of openings extending therethrough to expose portions of the underlying substrate; c) etching the exposed portions of the underlying substrate to form openings extending into the substrate; d) after etching the exposed portions of the underlying substrate, removing portions of the nitride layer while leaving some of the nitride layer remaining over the substrate; and e) after removing portions of the nitride layer, forming oxide within the openings in the substrate, the oxide within the openings forming at least portions of isolation regions.
    Type: Application
    Filed: April 21, 2006
    Publication date: October 19, 2006
    Inventors: David Dickerson, Richard Lane, Charles Dennison, Kunal Parekh, Mark Fischer, John Zahurak
  • Publication number: 20060202809
    Abstract: Method and apparatus for detecting cargo state in a delivery vehicle. A method is provided for determining a cargo state in a delivery vehicle. The method includes sensing a cargo state change, and determining whether or not the delivery vehicle is in motion. The method also includes storing the cargo state change if it is determined that the delivery vehicle is not in motion.
    Type: Application
    Filed: March 2, 2005
    Publication date: September 14, 2006
    Inventors: Richard Lane, William Peckham, Mark Parisi, Mark Doyle, Ken Oertle, Charles Pedersen, Bratislav Matic, William Molesworth
  • Publication number: 20060132354
    Abstract: A method for processing returns from a sensor, such as a radar system, in order to identify targets is provided. The method uses a track before detect routine to integrate data from several scans in order to give better discrimination. In running the track before detect routine however a number of possible target motions are postulated and the data combined accounting for such motions. A result above a threshold may then be indicative to a target present and moving with the postulated velocity. The method gives more accurate target detection as the combined data at the correct target motion postulate is more consistent than transient noise and clutter. Once a target has been identified it is preferably removed from the data set in searching for additional targets.
    Type: Application
    Filed: January 29, 2004
    Publication date: June 22, 2006
    Inventors: Gavin Beard, Robert Horey, Richard Lane, Samantha Lycett
  • Publication number: 20060003182
    Abstract: Methods for forming accurate, symmetric cross-section spacers of hardmask material on a substrate such as a silicon wafer or quartz substrate, for formation of precise subresolution features useful for forming integrated circuits. The resulting symmetrical hardmask spacers with their symmetric upper portions may be used to accurately etch well-defined, high aspect ratio features in the underlying substrate. Some disclosed methods also enable simultaneous formation of hardmask structures of various dimensions, of both conventional and subresolution size, to enable etching structural features of different sizes in the underlying substrate.
    Type: Application
    Filed: July 1, 2004
    Publication date: January 5, 2006
    Inventors: Richard Lane, Fred Fishburn
  • Publication number: 20060005106
    Abstract: A broadcast multimedia data stream is partitioned into two or more parts based on importance, e.g., a first part might represent more significant bits in groups of bits representing pixel colors in a video frame, while a second part might represent the less significant bits in the groups. The more important part of the stream is error correction coded at a lower rate or using a more powerful coding technique (i.e., with more error correction coding) than is the less important part of the stream.
    Type: Application
    Filed: August 4, 2005
    Publication date: January 5, 2006
    Inventors: Richard Lane, Maksim Krasnyanskiy, Mark Charlebois, Richardo Lopez, William Gardner
  • Patent number: 6979849
    Abstract: A memory cell having improved interconnect. Specifically, a dynamic random access memory (DRAM) based content addressable (CAM) memory cell is provided. The lower cell plate of the storage capacitor is implemented to provide an interconnect for the access transistor and the CAM portion of the memory cell. Conductive plugs are coupled to each of the transistors and coupled directly to the lower cell plate of the capacitor.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: December 27, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Richard Lane
  • Publication number: 20050256873
    Abstract: System for providing hierarchical services in a data network. A method is provided for inserting content into a content stream for rendering on a device. The method includes obtaining one or more annotation parameters that comprise a content identifier, and determining an insertion point indicator that indicates a location in the content stream. The method also includes retrieving the content based on the content identifier, and inserting the content in the content stream at a location indicated by the insertion point indicator.
    Type: Application
    Filed: April 21, 2005
    Publication date: November 17, 2005
    Inventors: Gordon Walker, George Wiley, Ricardo Lopez, Richard Lane, Rajiv Vijayan
  • Publication number: 20050186779
    Abstract: Method and structure use support layers to assist in planarization processes to form conductive materials (e.g., a Group VIII metal) in an opening. Further, such method and structure may use a Group VIII metal as an etch stop or end point for the planarization process with subsequent etching to remove undesired portions of the Group VIII metal. One exemplary method of providing a conductive material in an opening includes providing a substrate assembly having at least one surface and providing an opening defined through the surface of the substrate assembly. The opening is defined by at least one surface. At least one conductive material (e.g., at least one Group VIII metal such platinum and/or rhodium) is formed within the opening on the at least one surface defining the opening and on at least a portion of the substrate assembly surface. A support film (e.g., an oxide material) is formed over the conductive material and a fill material (e.g.
    Type: Application
    Filed: April 25, 2005
    Publication date: August 25, 2005
    Inventors: Howard Rhodes, Richard Lane