Abstract: A non-volatile tri-state random access memory device, including a permanent magnetic bit; a write module in functional communication with the permanent magnetic bit and configured to selectably alter the permanent magnetic bit between three magnetic states, a write module including a write coil disposed about the permanent magnetic bit and in communication with a source of electrical power; and a read module in functional communication with the permanent magnetic bit and configured to observe and communicate each of three magnetic states of the permanent magnetic bit, the read module including a read sensor coupled to a read return line.

Abstract: A non-volatile random access memory device. The non-volatile random access memory device may include a magnetic bit, a write/sense, and a read pulse module. The read pulse module may be configured to send a read pulse signal to the magnetic bit. In addition, a write module may be in communication with the write/sense coil and may be configured to thereby change the magnetic bit between a first magnetic polarity state and a second magnetic polarity state. A read module may be in communication with the write/sense coil and may be configured to detect a first characteristic of the write/sense coil when a read pulse signal is delivered to the magnetic bit in the first magnetic polarity state and to detect a second characteristic of the write/sense coil when a read pulse signal is delivered to the magnetic bit in the second magnetic polarity state.

Abstract: A non-volatile tri-state random access memory device, including a permanent magnetic bit; a write module in functional communication with the permanent magnetic bit and configured to selectably alter the permanent magnetic bit between three magnetic states, a write module including a write coil disposed about the permanent magnetic bit and in communication with a source of electrical power; and a read module in functional communication with the permanent magnetic bit and configured to observe and communicate each of three magnetic states of the permanent magnetic bit, the read module including a read sensor coupled to a read return line.

Abstract: A memory device. There is a hall effect device, a current source in electrical communication with the hall effect device, a current drain in electrical communication with the hall effect device, a first sensor arm in electrical communication with the hall effect device and current drain, and a second sensor arm in electrical communication with the hall effect device and current drain. The second sensor arm has a higher resistance than the first sensor arm. There is a voltage measurement module in electrical communication with the current drain and configured to provide a signal based on the voltage in the current drain.

Abstract: A non-volatile random access memory device. The non-volatile random access memory device may include a magnetic bit, a write/sense, and a read pulse module. The read pulse module may be configured to send a read pulse signal to the magnetic bit. In addition, a write module may be in communication with the write/sense coil and may be configured to thereby change the magnetic bit between a first magnetic polarity state and a second magnetic polarity state. A read module may be in communication with the write/sense coil and may be configured to detect a first characteristic of the write/sense coil when a read pulse signal is delivered to the magnetic bit in the first magnetic polarity state and to detect a second characteristic of the write/sense coil when a read pulse signal is delivered to the magnetic bit in the second magnetic polarity state.

Abstract: A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is no power provided to the circuitry, thus saving power during operation of the programmable logic circuitry, and ensuring that there is no loss of the data should there be a temporary power shut down. Additionally, the ferromagnetic cells provide for indefinite number of switching actions on the data without degradation to the capacity to store data therein. The invention provides an integrated circuit, comprising a programmable logic circuit array having product lines and input lines therein, and a storage register circuit. The storage register circuit has a ferromagnetic bit and sensor coupled to store a remnant control signal and an output transistor, coupled to be responsive to the remnant control signal on its gate, and coupled between an input and product line.

Abstract: A ferromagnetic memory cell is disclosed having a base (21), oriented in a horizontal plane, a bit (19), made of a ferromagnetic material, and a sense/write line (20), positioned proximate the bit (19) sufficient to detect the directed polarity of the bit when a first current is applied thereto, and to direct the polarity of the bit when a second larger current is applied thereto in a given direction. The bit (19) has a height that is oriented perpendicular to the horizontal plane of the base, and a polarity that can be directed along the height.

Abstract: A ferromagnetic memory cell is disclosed. The cell includes a bit (10), made of a ferromagnetic material, having a remnant polarity. The cell also includes a read drive line (20) coupled to a first portion of the bit (10), to feed a current into the bit (10). A sense conductor (30) is coupled to a second portion of the bit (10), to receive the current from the bit (10). The current conducted through the bit (10) is responsive to the polarity of the bit (10). A method is also disclosed for determining the magnetic polarity of a ferromagnetic bit (10). In this method, a bit (10) is provided that is made of ferromagnetic material and has a remnant polarity. An input current (50) is fed into the bit (10) through a read drive line (20) coupled to a first portion of the bit (10). An output current (60) is received from the bit (10) through a sense conductor (30) coupled to a second portion of the bit (10). The current conducted through the bit (10) is responsive to the polarity of the bit (10).

Abstract: A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is no power provided to the circuitry, thus saving power during operation of the programmable logic circuitry, and ensuring that there is no loss of the data should there be a temporary power shut down. Additionally, the ferromagnetic cells provide for indefinite number of switching actions on the data without degradation to the capacity to store data therein. The invention provides an integrated circuit, comprising a programmable logic circuit array having product lines and input lines therein, and a storage register circuit. The storage register circuit has a ferromagnetic bit and sensor coupled to store a remnant control signal and an output transistor, coupled to be responsive to the remnant control signal on its gate, and coupled between an input and product line.

Abstract: Several methods may be employed to make this cell including, but not limited to, electroplating, sputtering, E-beam deposition, chemical vapor deposition and molecular beam epitaxy. Numerous modifications and alternative arrangements may be devised by those skilled in the art without departing from the spirit and scope of the present invention and the appended claims are intended to cover such modifications and arrangements. Thus, while the present invention has been described above with particularity and detail in connection with what is presently deemed to be the most practical and preferred embodiments of the invention, it will be apparent to those of ordinary skill in the art that numerous modifications, including, but not limited to, variations in size, materials, shape, form, function, manner of operation, assembly, and use may be made without departing from the principles and concepts set forth herein.

Abstract: A ferromagnetic memory cell is disclosed. The cell includes a bit (10), made of a ferromagnetic material, having a remnant polarity. The cell also includes a read drive line (20) coupled to a first portion of the bit (10), to feed a current into the bit (10). A sense conductor (30) is coupled to a second portion of the bit (10), to receive the current from the bit (10). The current conducted through the bit (10) is responsive to the polarity of the bit (10). A method is also disclosed for determining the magnetic polarity of a ferromagnetic bit (10). In this method, a bit (10) is provided that is made of ferromagnetic material and has a remnant polarity. An input current (50) is fed into the bit (10) through a read drive line (20) coupled to a first portion of the bit (10). An output current (60) is received from the bit (10) through a sense conductor (30) coupled to a second portion of the bit (10). The current conducted through the bit (10) is responsive to the polarity of the bit (10).

Abstract: A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is no power provided to the circuitry, thus saving power during operation of the programmable logic circuitry, and ensuring that there is no loss of the data should there be a temporary power shut down. Additionally, the ferromagnetic cells provide for indefinite number of switching actions on the data without degradation to the capacity to store data therein. The invention provides an integrated circuit, comprising a programmable logic circuit array having product lines and input lines therein, and a storage register circuit. The storage register circuit has a ferromagnetic bit and sensor coupled to store a remnant control signal and an output transistor, coupled to be responsive to the remnant control signal on its gate, and coupled between an input and product line.

Abstract: A Hall effect ferromagnetic non-volatile random access memory cell comprising a Hall effect sensor adjacent to a ferromagnetic bit which is surrounded by a drive coil. The coil is electrically connected to a drive circuit, and when provided with an appropriate current creates a residual magnetic field in the ferromagnetic bit, the polarity of which determines the memory status of the cell. The Hall effect sensor is electrically connected via four conductors to a voltage source, ground, and two read sense comparator lines for comparing the voltage output to determine the memory status of the cell. The read and write circuits are arranged in a matrix of bit columns and byte rows. A method for manufacturing said Hall effect ferromagnetic non-volatile random access memory cell.

Abstract: A Hall effect ferromagnetic non-volatile random access memory cell comprising a Hall effect sensor adjacent to a ferromagnetic bit which is surrounded by a drive coil. The coil is electrically connected to a drive circuit, and when provided with an appropriate current creates a residual magnetic field in the ferromagnetic bit, the polarity of which determines the memory status of the cell. The Hall effect sensor is electrically connected via four conductors to a voltage source, ground, and two read sense comparator lines for comparing the voltage output to determine the memory status of the cell. The read and write circuits are arranged in a matrix of bit columns and byte rows. A method for manufacturing said Hall effect ferromagnetic non-volatile random access memory cell.