Patents by Inventor Richard Louis Arndt

Richard Louis Arndt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6892383
    Abstract: A method, system, and apparatus for informing a plurality of operating systems, each assigned to a separate partition within a logically partitioned data processing system, of which functions, provided by a hypervisor for creating and enforcing separation of the logical partitions, are available for use by the operating systems is provided. In a preferred embodiment, the hypervisor includes a plurality of function sets. Each function set includes a list of functions that may be called by any one of the operating systems to perform tasks for the operating systems while maintaining separation between each of the logical partitions. The hypervisor informs each of the plurality of operating systems of an enabled function set. Functions identified within the enabled function set are enabled for use by each of the plurality of operating systems and functions not identified within the enabled function set are disabled for use by each of the plurality of operating systems.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: May 10, 2005
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6877158
    Abstract: A method, system, and apparatus for mediating address translation in a logically partitioned data processing system is provided. In one embodiment, a firmware component receives from an operating system within a logical partition a request to access a physical resource. The firmware component, responsive to a determination that the physical resource has been allocated to the logical partition, modifies an address translation table, if necessary, to allow access to the physical resource by the operating system. The operating system is prevented from directly modifying the address translation table, thus preventing potential interference between operating systems within the logically partitioned data processing system.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: April 5, 2005
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6836855
    Abstract: A method, system, and apparatus for isolating fatal data fetch errors to a single partition within a logically partitioned data processing system. In one embodiment, the logically partitioned data processing system includes a plurality of operating systems and a plurality of processors is provided. Each of the operating systems is assigned to a separate one of a plurality of logical partitions. Each of the processors is assigned to one of the plurality of logical partitions. The logically partitioned data processing system also includes a hypervisor for creating and maintaining separation of the plurality of logical partitions. The hypervisor contains services and functions accessed by each of the logical partitions and, to prevent fatal data fetch errors in one partition from effecting other partitions within the logically partitioned data processing system, the hypervisor includes a plurality of data structure areas.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: December 28, 2004
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6823404
    Abstract: A method, system, and apparatus for preventing input/output (I/O) adapters used by an operating system (OS) image, in a logically partitioned data processing system, from fetching or corrupting data from a memory location allocated to another OS image within the data processing system is provided. A hypervisor prevents transmission of data between an input/output adapter in one of the logical partitions and memory locations assigned to other logical partitions during a direct memory access (DMA) operation by assigning each of the input/output adapters a range of I/O bus DMA addresses. The I/O adapters (IOAs) are connected to PCI host bridges via terminal bridges. A single terminal bridge may support multiple IOAs, in which case every terminal bridge has a plurality of sets of range registers, each associated with a respective one of the IOAs to which it is connected. An arbiter is provided which selects one of the input/output adapters to use the PCI bus.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Danny Marvin Neal, Steven Mark Thurber
  • Publication number: 20040205253
    Abstract: An apparatus, system and method for controlling access to facilities based on usage class of a requestor are provided. With the apparatus, system and method, a two level protection mechanism is provided for protecting host channel adapter (HCA) facilities from unauthorized access. With the present invention, a first level of access is provided through virtual address translation and a mechanism for determining if the requestor of access may access a system memory address space page associated with a real address to which the virtual address maps. A second level of access is provided through the allocation of usage classes and determining a required usage class for accessing an HCA facility.
    Type: Application
    Filed: April 10, 2003
    Publication date: October 14, 2004
    Applicant: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Bruce Marshall Walk
  • Publication number: 20040202189
    Abstract: An apparatus, system and method for providing multiple logical partitions in a system area network are provided Logical partitioning support is provided for host channel adapters which allows multiple operating systems to share the resources of a single physical host channel adapter (HCA). The apparatus, system and method ensures that each operating system is unaware that the HCA hardware resources are being shared with other operating systems and further guarantees that the individual operating systems are prevented from accessing HCA hardware resources which are associated with other operating systems.
    Type: Application
    Filed: April 10, 2003
    Publication date: October 14, 2004
    Applicant: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Bruce Leroy Beukema, David F. Craddock, Ronald Edward Fuhs, Thomas Anthony Gregg, Allan Samuel Meritt, Calvin Charles Paynton, Steven L. Rogers, Donald William Schmidt, Bruce Marshall Walk
  • Publication number: 20040205272
    Abstract: A resource and partition manager virtualizes interrupts without using any additional hardware in a way that does not disturb the interrupt processing model of operating systems running on a logical partition. In other words, the resource and partition manager supports virtual interrupts in a logically partitioned computer system that may include share processors with no changes to a logical partition's operating system. A set of virtual interrupt registers is created for each virtual processor in the system. The resource and partition manager uses the virtual interrupt registers to process interrupts for the corresponding virtual processor. In this manner, from the point of view of the operating system, the interrupt processing when the operating system is running in a logical partition that may contain shared processors and virtual interrupts is no different that the interrupt processing when the operating system is running in computer system that only contains dedicated processor partitions.
    Type: Application
    Filed: March 31, 2003
    Publication date: October 14, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William Joseph Armstrong, Richard Louis Arndt, Naresh Nayar
  • Patent number: 6789048
    Abstract: According to a method form of the invention, in a computer system having a processing load distributed among a number of processors in the system, test computations are performed at intervals by floating point logic of a processor responsive to stored test instructions. Responsive to the test computations indicating an erroneous result by one of the processors information is passed by a firmware process and entered into an operating system error log. Responsive to the information, an operating system deconfiguration service is notified of the error log entry, and the service deconfigures the indicated processor, while the system is still running.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: September 7, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Douglas Marvin Benignus, Douglas Craig Bossen, Daniel James Henderson, Alongkorn Kitamorn
  • Publication number: 20040139437
    Abstract: A logically partitioned data processing system in which shared resources are emulated to provide each partition a separate copy of the shared resource is provided. In one embodiment, the logically partitioned data processing system includes a plurality of logical partitions, a plurality of operating systems executing within the data processing system and a plurality of assignable resources. Each of the plurality of operating systems is assigned to a separate one of the plurality of logical partitions, such that no more than one operating system is assigned to any given logical partition. Each of the plurality of assignable resources is assigned to a single one of the plurality of logical partitions. The logically partitioned data processing system also includes a hypervisor. The hypervisor emulates shared resources, such as an operator panel and a system console, and provides a virtual copy of these shared resources to each of the plurality of logical partitions.
    Type: Application
    Filed: December 12, 2003
    Publication date: July 15, 2004
    Inventor: Richard Louis Arndt
  • Patent number: 6751679
    Abstract: A method, system, and apparatus for secure programmable addressing is provided by relocating functions within a multifunctional chip to be distributed across multiple logical partitions and maintaining security over the distribution mechanism. In one embodiment, this invention is used by a data processing system including a system processor connected to a plurality of operating system instances that are allocated individual system functions. Using logical partitioning, each operating system instance's access is limited to its own partition. Address buses to system functions are manipulated to make the functions appear at appropriate memory locations expected by the operating system instances. Accordingly, an inverter can be inserted on the address bus to change the address to a given distance in memory safe from operating system accessibility, for example, a page boundary.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: June 15, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Craig Henry Shempert
  • Patent number: 6725284
    Abstract: The present invention provides a method for sharing I/O facilities among logical partitions. A remote translation control entry table is created on a hosted partition appearing to own a virtual copy of the I/O facilities to be shared. The remote translation control entry table on the hosted partition is loaded with data from a hypervisor in response to requests made by the OS running in the hosted partition. The hypervisor, in response to requests from the OS running in the hosting partition, copies the data from the remote translation control entry into a standard translation control entry table on the hosting partition owning the physical I/O facilities that target the I/O page buffers of the hosted partition to perform the desired I/O operation. The I/O page buffers of the hosted partition are accessed by the hosting partition's I/O facilities using the data stored in the standard translation control entry table.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: April 20, 2004
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6658591
    Abstract: A method, system, and apparatus for isolating fatal data fetch errors to a single partition within a logically partitioned data processing system. In one embodiment, the logically partitioned data processing system includes a plurality of operating systems and a plurality of processors is provided. Each of the operating systems is assigned to a separate one of a plurality of logical partitions. Each of the processors is assigned to one of the plurality of logical partitions. The logically partitioned data processing system also includes a hypervisor for creating and maintaining separation of the plurality of logical partitions. The hypervisor contains services and functions accessed by each of the logical partitions and, to prevent fatal data fetch errors in one partition from effecting other partitions within the logically partitioned data processing system, the hypervisor includes a plurality of data structure areas.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6654906
    Abstract: A method, system, and apparatus for recovering form an instruction fetch error is provided. In one embodiment, a data processing system maintains a primary copy and an alternate copy of a set of instructions for a software component. The instructions for performing the processes of the software component are fetched from the primary copy for execution by a processor. A pair of pointers is maintained in each copy identifying the beginning of each copy. Responsive to a determination that an instruction fetch error has been received, a corresponding current instruction in the alternate copy is determined and the software component is restarted by fetching and executing instructions from the alternate copy starting with the corresponding current instruction. The corresponding current instruction is determined by subtracting the beginning address of the copy with the error from the address of the current instruction, then adding the beginning address of the alternate copy.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: November 25, 2003
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6643727
    Abstract: A method, system, and apparatus for isolating an input/output (I/O) bus error, received from an I/O adapter, from the other I/O adapters that may be in different partitions within a logically partitioned data process system is provided. In one embodiment, the logically partitioned data processing system includes a system bus, a processing unit, a memory unit, a host bridge, a plurality of terminal bridges, and a plurality of input/output adapters. The processing unit, memory unit, and the host bridge are all coupled to each other through the system bus. Each of the plurality of terminal bridges is coupled to the host bridge through a first bus. Each of the input/output adapters is coupled to one of the plurality of terminal bridges through a one of a plurality of second buses, such that each input/output adapter corresponds to a single terminal bridge. Each of the input/output adapters are assigned to one of a plurality of logical partitions within the data processing system.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: November 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Steven Mark Thurber
  • Publication number: 20030204648
    Abstract: The present invention provides a method for sharing I/O facilities among logical partitions. A remote translation control entry table is created on a hosted partition appearing to own a virtual copy of the I/O facilities to be shared. The remote translation control entry table on the hosted partition is loaded with data from a hypervisor in response to requests made by the OS running in the hosted partition. The hypervisor, in response to requests from the OS running in the hosting partition, copies the data from the remote translation control entry into a standard translation control entry table on the hosting partition owning the physical I/O facilities that target the I/O page buffers of the hosted partition to perform the desired I/O operation. The I/O page buffers of the hosted partition are accessed by the hosting partition's I/O facilities using the data stored in the standard translation control entry table.
    Type: Application
    Filed: April 25, 2002
    Publication date: October 30, 2003
    Applicant: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Publication number: 20030191881
    Abstract: A computer system has physical pages of memory subject to access by input/output (“I/O”) devices, and a certain table with entries associating the physical pages with the I/O devices. Responsive to a request for data be moved from a first physical page to a second physical page, an entry is selected for the first physical page in the table. The selected entry indicates an association of the first physical page and one of the I/O devices. Arbitration is temporarily disabled for the selected I/O device so that I/O operations for the I/O device are temporarily disabled. Once arbitration is disabled for the device the data is moved from the first physical page to a second one of the physical pages and the entry is updated in the table to reflect a new association between the I/O device and the second physical page.
    Type: Application
    Filed: April 4, 2002
    Publication date: October 9, 2003
    Applicant: International Business Machines Corproration
    Inventors: Richard Louis Arndt, Luke Matthew Browning, Bruce Mealey, Steven Mark Thurber
  • Publication number: 20030191607
    Abstract: According to a method form of the invention, in a computer system having a processing load distributed among a number of processors in the system, test computations are performed at intervals by floating point logic of a processor responsive to stored test instructions. Responsive to the test computations indicating an erroneous result by one of the processors information is passed by a firmware process and entered into an operating system error log. Responsive to the information, an operating system deconfiguration service is notified of the error log entry, and the service deconfigures the indicated processor, while the system is still running.
    Type: Application
    Filed: April 4, 2002
    Publication date: October 9, 2003
    Applicant: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Douglas Marvin Benignus, Douglas Craig Bossen, Daniel James Henderson, Alongkorn Kitamorn
  • Patent number: 6629162
    Abstract: A method, system, and apparatus for preventing input/output (I/O) adapters used by an operating system (OS) image, in a logically partitioned system, from accessing data from a memory location allocated to another OS image is provided. The system includes logical partitions, operating systems (OSs), memory locations, I/O adapters (IOAs), and a hypervisor. Each operating system image is assigned memory locations and input/output adapter is assigned to a logical partition. Each of the input/output adapters is assigned a range of I/O bus DMA addresses by the hypervisor. When a DMA operation request is received from an OS image, the hypervisor checks that the memory address range and the I/O adapter are allocated to the requesting OS image and that the I/O bus DMA range is within the that allocated to the I/O adapter. If these checks are passed, the hypervisor performs the requested mapping; otherwise the request is rejected.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Steven Mark Thurber
  • Publication number: 20030159086
    Abstract: A method, system, and apparatus for isolating fatal data fetch errors to a single partition within a logically partitioned data processing system. In one embodiment, the logically partitioned data processing system includes a plurality of operating systems and a plurality of processors is provided. Each of the operating systems is assigned to a separate one of a plurality of logical partitions. Each of the processors is assigned to one of the plurality of logical partitions. The logically partitioned data processing system also includes a hypervisor for creating and maintaining separation of the plurality of logical partitions. The hypervisor contains services and functions accessed by each of the logical partitions and, to prevent fatal data fetch errors in one partition from effecting other partitions within the logically partitioned data processing system, the hypervisor includes a plurality of data structure areas.
    Type: Application
    Filed: March 13, 2003
    Publication date: August 21, 2003
    Inventor: Richard Louis Arndt
  • Publication number: 20030058875
    Abstract: A distributed computing system is provided having (host and I/O) end nodes, switches, routers, and links interconnecting these components. The end nodes use send and receive queue pairs to transmit and receive messages. The end nodes use completion queues to inform the end user when a message has been completely sent or received and whether an error occurred during the message transmission or reception process. A mechanism may implement these queue pairs and completion queues in hardware. A mechanism controls the transfer of work requests from the consumer to the channel adapter hardware using only head pointers in the hardware is described, along with a mechanism for passing work completions from the channel adapter hardware to the consumer using only tail pointers in the hardware. With this scheme the channel adapter hardware can inform the CI that a work request has been completed and provide the work completion information with just a single write to system memory.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 27, 2003
    Applicant: International Business Machines corporation
    Inventors: Richard Louis Arndt, David F. Craddock, Thomas Anthony Gregg, Ian David Judd, Gregory Francis Pfister, Renato John Recio, Donald William Schmidt