Abstract: A circuit for determining which of a plurality of binary numbers has the greatest decimal equivalent includes a binary-to-decimal converter which converts each of the binary numbers to a decimal equivalent code, a series of logic OR gates which OR together corresponding bits of like decimal value of each of the decimal equivalent codes, a priority encoder which compares the outputs of the OR gates, determines which output of the OR gates is active and has the greatest decimal value of the decimal codes, and converts the decimal code having the greatest value to a binary number, and a comparator which compares the binary number from the priority encoder with each of the binary numbers provided to the binary-to-decimal converter.

Abstract: A high resolution event occurrence time counter includes a free running counter which is responsive to a clock signal and which provides count data that varies in response to the clock signal. A first register stores the count data of the free running counter. The first register provides first register data representative of the count data stored in the register. A second register stores the first register data and provides first time of arrival data representative of the first register data stored in the second register. A third register stores the count data of the free running counter. The third register provides second time of arrival data representative of the count data which is stored in the third register. A clock edge encoder determines whether an event occurred during the first half cycle of the clock signal or during the second half cycle.