Abstract: An exemplary CMOS image sensor comprises a reset transistor, a photodiode, reset drain voltage circuitry, and reset gate voltage circuitry. A cathode of the photodiode is connected to a source of the reset transistor, and an anode of the photodiode is connected to ground. The reset drain voltage circuitry is connected to a drain of the reset transistor, and the reset gate voltage circuitry is connected to a gate of the reset transistor. During an exemplary hard reset operation, the reset drain voltage circuitry supplies a first drain voltage to the drain of the reset transistor in accordance with a determined level of light for exposure, which is determined dynamically. According to another exemplary reset operation, a hard reset phase is immediately followed by a soft reset phase.

Abstract: The present invention relates to devices and methods for image sensing. In one aspect, the present invention relates to a device including a plurality of pixels, wherein each pixel includes a charge transfer device and photodetector, and each of the pixels has a pitch of about 3 microns or less. This aspect further includes a select transistor, a reset transistor, a source follower transistor, and a sense node, wherein the select transistor, the reset transistor, the source follower transistor, and the sense node are shared by the plurality of pixels.

Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.

Abstract: A nozzle for a plasma arc cutting torch is provided with an electrically conductive, heat resistant insert, preferably tungsten or a tungsten alloy. As an alternative to the insert, the material can be coated on the entire inner surface of the nozzle. In either embodiment, the material also can be coated on the outer surface of the nozzle.

Abstract: A method implemented with a machine, the machine, and the method for using the machine, and products produced thereby, the method including using a digital electronic computer having a processor programmed for electronically processing input data into output data, the computer electronically connected to an input device and to output devices, for calculating expected and projected results of assumptions related to specific contractual exposures (either underlying plans of insurance or reinsurance, or contractual insurable risk exposure to individuals, or corporate contractual benefit payment exposures to individuals), maintaining and storing such calculations, periodically comparing the expected and projected results to actual occurrences results as inputted into the computer, calculating the differences between actual and projected results and preparing reports of the results of the calculations.

Abstract: Machine and related manufacturer controlling multi-jurisdictional investment; a computer system arranged to receive information and locate said information into a memory, the information including investment specifications and pricing data for the financial product, the computer system further including: an input device for receiving the information and converting the information into signals; a program control to compute, from said signals, for calculating respective valuations of parts of investment in respective jurisdictions and a program control to trigger printing documentation, including said valuations, to carry out the implementation of the parts in the respective jurisdictions. In variations thereof, such as optimizing, separating, valuation, and execution are supported.

Abstract: The present invention is directed to a solid state imaging device comprising a red pixel, a blue pixel, a first green pixel, a second green pixel, two analog-to-digital converters and a color interpolation circuit. The first analog-to-digital converter converts the output of the red pixel and output of the blue pixel into digital signals. The second analog-to-digital converter converts the output of the first green pixel and output of the second green pixel into digital signals. The color interpolation circuit combines the digital signals to determine the color of the pixel. The solid state imaging device may further comprise a third analog-to-digital converter, a fourth analog-to-digital converter, a programmable clock generator and a control. The third analog-to-digital converter converts the output of the blue pixel into a digital signal and the fourth analog-to-digital converter converts the output of the second green pixel into a digital signal.

Abstract: An exemplary CMOS image sensor comprises a plurality of pixels arranged in an array. The plurality of pixels includes a first pixel proximate an optical center of the array, and a second pixel proximate a peripheral edge of the array. The CMOS image sensor further comprises a first metal interconnect segment associated with the first pixel situated in a first metal layer, and a second metal interconnect segment associated with the second pixel situated in the first metal layer. The second metal interconnect segment is shifted closer to the optical center of the array than the first metal interconnect segment so that the second metal interconnect segment approximately aligns with a principle ray angle incident the second pixel, thereby reducing pixel light shadowing.

Abstract: A CMOS imager includes a CMOS image sensor comprising an array of photoreceptors, a memory storing a reference operating level for the array, and readout circuitry for obtaining, at n-bit resolution, a photoreceptor reset value from the photoreceptors in the array. In addition, the CMOS imager includes comparison circuitry that determines a difference between the reference operating level and the photoreceptor reset value as well as matching circuitry that matches the difference against bins in a bin allocation. In particular, the bin allocation spans a photoreceptor noise range with the bins forming a quantization of the noise range into correction levels. Each of the correction levels may be associated with an m-bit correction code, where m is typically much less than n. As a result, the amount of memory necessary to store the correction codes is far less than that required to store full resolution (i.e., n-bit) values.

Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.

Abstract: An improved semiconductor device that reduces reverse bias junction leakage in a photodiode by using a junction isolation region to isolate the photodiode from a trench isolation region. The improved semiconductor device improves image quality for different applications such as stand-alone digital cameras and digital cameras embedded in other imaging devices such as cellular phones and personal digital assistants.

Abstract: An image sensor and method is provided to improve the measurement of a dark signal reference while substantially suppressing radiation charges that enter an active area of the image sensor from reaching a shielded dark signal detector. In one implementation, dark signal detector is shielded and separated from the active area to substantially reduce the radiation charges that reach the dark signal detector. In another implementation, the image sensor includes a radiation guard that is disposed between the active area and the shielded detector. When radiation or light is permitted to enter the active area, the guard when adequately biased attracts and collects radiated charges that may otherwise travel beyond the active area to reach the shielded detector and contaminate a measurement for the dark signal reference.

Abstract: A solid state color imager with preferential response to two or more colors of light includes a first color-selective photoreceptor built in part from a first color-selective semiconductor region limited in depth according to a first color fractional absorption ratio for a first color of light, as well as a second color-selective photoreceptor built in part from a second color-selective semiconductor region limited in depth according to a second color fractional absorption ratio for a second color of light. The imager may provide a light shield above the second color-selective semiconductor region and position the second color-selective photoreceptor in proximity to the first color-selective photoreceptor. The second color-selective photoreceptor may then collect electrons diffusing from the first color-selective photoreceptor and generated by the second color of light.

Abstract: An image sensor having a photo-detector and a reset contact that are electrically connected by a discharge path disposed between the reset contact and the photo-detector. The photo-detector has a depletion region for receiving and collecting radiation charges that are discharged through the discharge path to the reset contact. In one implementation, the reset of the photo-detector to a known potential is achieved by applying a high reset voltage to the reset contact that causes a reset depletion region to form beneath the reset contact. The outer perimeter of the reset depletion region defines a reset junction. The reset junction and the photo-detector junction are of the same polarity. As the high reset voltage is increased at the reset junction, the reset depletion region merges via punch through with the photo-detector's depletion region to create the discharge path.

Abstract: An improved semiconductor device that reduces reverse bias junction leakage in a photodiode by using a junction isolation region to isolate the photodiode from a trench isolation region. The improved semiconductor device improves image quality for different applications such as stand-alone digital cameras and digital cameras embedded in other imaging devices such as cellular phones and personal digital assistants.

Abstract: An apparatus and method for achieving uniform low dark currents with CMOS photodiodes. A threshold voltage of a reset FET is set to an appropriate value such that the dark current from a photodiode is actively removed through the reset FET during signal integration. This reduces the dark current by over 3 orders of magnitude as compared to conventional active pixel sensors, without requiring pinned photodiodes.

Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.

Abstract: A method of fabricating semiconductor devices, such as conductors, fuses, capacitors, diodes, transistors, and the like, includes forming or obtaining a semiconductor wafer having a substrate material, an oxide layer, and a nitride layer. Mesas (the edges of which include active regions) are then formed by etching trenches (gaps) into the substrate material through the nitride and oxide layers. In accordance with one aspect of the present invention, the nitride layer is then pulled-back or retracted from the edges of the active regions thus exposing the corners of the active regions. The gaps and the edges of the active regions are then lined with a layer of oxide which rounds the corners of the active regions. The gaps are filled with another layer of oxide, and the semiconductor wafer is then planarized. Optionally, the edges of the active regions are then implanted with dopant.

Abstract: The switching properties of the disclosed device, low off current and high on current, also allows the device to be employed to replace EEPROM, fuses, anti-fuses or other electrically-alterable non volatile switching devices in programmable logic devices. The disclosed device can be fabricated with low cost methods. The manufacturing methods are compatible with current tools and procedures which allows the device to be added to CMOS circuits to replace masked ROM with more flexible flash memory at a modest increase in cost. The cell operational method and manufacturing methods allows the size of the memory element to be scaled smaller to maintain a low cost and high performance as the minimum feature size of microelectronic circuits is reduced in the future. The disclosed cell approach also offers simpler programming methods to simplify memory array design, supports higher cell currents for high speed applications, and uses lower cost manufacturing methods than an "ETOX" cell approach.