Abstract: A semiconductor chip carrier includes a plurality of distributed high frequency decoupling capacitors as an integral part of the carrier. The distributed capacitors are formed as a part of the first and second layers of metallurgy and separated by a layer of thin film dielectric material built up on a substrate. The distributed capacitors are positioned to extend from a ground pin of one of the layers of metallurgy to a plurality of mounting pads which are intergral parts of the other of the layers of metallurgy. A semiconductor chip is mounted to the mounting pads and receives electrical power and signals therethrough. The distributed capacitors decrease electrical noise associated with simultaneous switching of relatively large numbers of off-chip drivers which are electrically connected to the semiconductor chip.