Abstract: A digital blanking circuit allows a first digital input signal transition to be passed on to a following stage, but prohibits the passing of subsequent transitions for a predetermined blanking interval. One embodiment of the present invention employs rising edge and falling edge latches, the inputs of which receive the digital input signal and the outputs of which are connected to a two-to-one multiplexer. The mux output is connected to a blanking interval circuit, which is triggered to begin timing a blanking interval by a multiplexer output transition. The blanking interval circuit provides outputs which control the latches and selects the latch output to be transferred to the multiplexer output such that the multiplexer output is prevented from transitioning during a blanking interval.

Abstract: A switched noise filter circuit for DC-DC converters which use the instantaneous output voltage to establish the converter's duty ratio. The converter cycles the switching element on and off for time intervals Ton and Toff, respectively. A switching control circuit includes a filter capacitance connected between the feedback node and ground, and a comparator which compares a feedback voltage Vfb with a fixed voltage Vref; at least one of Ton and Toff is a “modulated” interval which is terminated when Vfb crosses Vref due to the discharge of the filter capacitance. A switched noise filter circuit applies an offset voltage to Vfb during at least one of Ton, and Toff, with the offset voltage disconnected from Vfb by the beginning of the modulated interval or shortly thereafter. When the offset voltage is properly applied, the effect of extraneous electromagnetic noise coupled into Vfb is reduced.

Abstract: A regulated DC and/or AC power supply connected to an AC power source comprising an essentially loss free impedance followed by a controllable device that can sink essentially without losses a selected portion of the current from the essentially loss free impedance. The controllable device can, also essentially without loss, source current from its own internal storage so that the combined residual current can be made available to a load either as a regulated AC quasi square wave or, after rectification, as a regulated DC. A preferred embodiment is described in detail comprising a transformer with a considerable leakage inductance between its primary and secondary. An analog, alternatively a microprocessor-based controller, and a mosfet driver supply a mosfet rectifying bridge with proper gate voltages to obtain a regulated AC and/or DC output. In its simplest form the programmable device may be a generator with controllable phase and amplitude.

Abstract: A switched noise filter circuit for DC-DC converters which use the instantaneous output voltage to establish the converter's duty ratio. The converter cycles the switching element on and off for time intervals Ton and Toff, respectively. A switching control circuit includes a filter capacitance connected between the feedback node and ground, and a comparator which compares a feedback voltage Vfb with a fixed voltage Vref; at least one of Ton and Toff is a “modulated” interval which is terminated when Vfb crosses Vref due to the discharge of the filter capacitance. A switched noise filter circuit applies an offset voltage to Vfb during at least one of Ton and Toff, with the offset voltage disconnected from Vfb by the beginning of the modulated interval or shortly thereafter. When the offset voltage is properly applied, the effect of extraneous electromagnetic noise coupled into Vfb is reduced.

Abstract: An inductor current emulation circuit for a switched-mode power supply (SMPS) which is arranged such that its inductor current (IL) goes to zero at least once per switching cycle. The emulation circuit includes an RC integrator connected in parallel across the inductor, and a zero reset switch (ZRS) connected in parallel across the integrator's capacitor. A control circuit operates the ZRS such that it is opened when IL is non-zero, and is closed for a least a portion of the time during each switching cycle when IL is zero such that the capacitor is substantially discharged. In this way, the ZRS essentially recalibrates the emulation circuit when IL is zero. When so arranged, the voltage (VC) across the capacitor emulates IL. The invention may be implemented with either a discontinuous-inductor-current SMPS, or a continuous-bipolar-inductor-current SMPS.

Abstract: An N-phase switching voltage regulator includes N current sensing elements which carry respective phase currents. The voltages present at the switch node sides of the sensing elements are summed and presented to an amplifier which also receives the regulator's output voltage, to produce an output which is proportional to the regulator's total output current Iout. The invention also provides a means for direct insertion of total inductor output current information into a regulator's voltage-mode control loop, to provide active voltage positioning (AVP) for the output voltage. A voltage based on total inductor output current is summed with the regulator's reference voltage; this sum and Vout are applied to the voltage control error amplifier, the output of which is processed to operate the regulator's switches. This enables the regulator's output to have a desired droop impedance and to provide AVP of Vout as a function of total filtered inductor output current Iout(fltr).

Abstract: An N-phase switching voltage regulator includes N current sensing elements which carry respective phase currents. The voltages present at the switch node sides of the sensing elements are summed and presented to an amplifier which also receives the regulator's output voltage, to produce an output which is proportional to the regulator's total output current Iout. The invention also provides a means for direct insertion of total inductor output current information into a regulator's voltage-mode control loop, to provide active voltage positioning (AVP) for the output voltage. A voltage based on total inductor output current is summed with the regulator's reference voltage; this sum and Vout are applied to the voltage control error amplifier, the output of which is processed to operate the regulator's switches. This enables the regulator's output to have a desired droop impedance and to provide AVP of Vout as a function of total filtered inductor output current Iout(fltr).

Abstract: A digital blanking circuit allows a first digital input signal transition to be passed on to a following stage, but prohibits the passing of subsequent transitions for a predetermined blanking interval. One embodiment of the present invention employs rising edge and falling edge latches, the inputs of which receive the digital input signal and the outputs of which are connected to a two-to-one multiplexer. The mux output is connected to a blanking interval circuit, which is triggered to begin timing a blanking interval by a multiplexer output transition. The blanking interval circuit provides outputs which control the latches and selects the latch output to be transferred to the multiplexer output such that the multiplexer output is prevented from transitioning during a blanking interval.

Abstract: A switching voltage regulator employs a “dual modulation” scheme to control the regulator's switching components. A control circuit indirectly monitors load current. When the load decreases, the control circuit reduces both the duty ratio and the frequency of the control signals which operate the switching transistors, thereby maintaining a high efficiency level over a wider output current range than can be achieved with fixed-frequency control signals. In a preferred embodiment, the regulator employs three operating modes. For heavy loads, the switching components are operated at a constant frequency. For moderate-to-light loads, the dual modulation control scheme is used. For light loads, the regulator enters a “pulse-skipping” mode which can achieve very low operating frequencies to further improve efficiency.

Abstract: A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved with a technique referred to as “optimal voltage positioning”, which keeps the output voltage within the specified boundaries while employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed. The invention can be used with regulators subject to design requirements that specify a minimum time Tmin between load transients, and with those for which no Tmin is specified.

Abstract: A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved by employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed, and by compensating the regulator to ensure a response that is flat after the occurrence of the peak deviation. The invention is applicable to both switching and linear voltage regulators.

Abstract: A power-factor-corrected switching power supply includes a power-factor-corrector cell followed by a current-fed dc/dc converter cell. Both cells operate in discontinuous current mode. A duty cycle modulator has its input coupled to the output of the current-fed dc/dc converter cell and its output coupled to the switch control inputs of both the PFC cell and the current-fed dc/dc converter cell so that both cells receive the same control signal.

Abstract: A pulse width modulated controller controls a zero-voltage switching resonant power converter or inverter. The on time of the power switch (110) of the converter or inverter is varied by an error amplifier (280) such that the output voltage of the converter or inverter maintains proportionality to a reference voltage (290). The off time is terminated by a switch-voltage detector (320) when the voltage across the power switch (110) drops below a threshold voltage (330) due to the natural resonance of the external resonating capacitor (120) and inductors (130 and 150). In the first two embodiments of the invention, a single timing capacitor (260) is employed both for determining the on time and the off time. In two other embodiments, two timing capacitors (262 and 264) are employed for separately determining the maximum allowed off time and the variable on time.

Abstract: An electronic ballast is powered by power source (102) and (104). The ballast controls the electrical power supplied to a gas discharge lamp (116), providing the voltages and currents required to start, warm-up and operate the lamp (116). Line power conditioner (100) reduces interference and harmonic generation, and provides a source of DC power (103), which may be regulated. DC power (103) is applied to inverter (105), which generates a square-wave voltage at a variable frequency determined by control circuit (200). Inverter (105) output is connected to resonant circuit (600) consisting of series inductor (110), series capacitors (112) and (118), and parallel inductor (114), across which gas discharge lamp (116) is connected. Operation begins with inverter (105) running at a frequency initially near but above the unloaded series resonance frequency of resonant circuit (600). Controller (200) reduces the frequency until resonant circuit (600) gives sufficient voltage to start lamp (116).

Abstract: An error signal isolator circuit for conveying an error signal across an electrical isolation boundary such as an external pulse transformer employs a level shifting process whereby a controllable voltage is measured with respect to a reference voltage and, with any gain implemented in the process, is level shifted upward such that the higher potential is referenced to a supply voltage and the lower potential is used dynamically to control the magnitude of voltage conveyed in a pulse amplitude modulation (PAM) process. In the PAM process, an ON pulse is terminated by monitoring when a PAM current has increased to a predetermined and controllable level. An ON pulse is initiated by monitoring when the voltage across a clamp diode has decayed below its normal forward bias level, indicating a commensurate decay in PAM current, following termination of the previous ON pulse.

Abstract: A primary side controller for regulated power converters may be implemented as a monolithic integrated circuit in which fewer pins are required as compared to the prior art 3842 controller. The present controller includes a current limit protection function having an extended time period over which a predetermined current value is reached.

Abstract: A high efficiency, high output, compact ignition coil particularly suited for use in capacitive discharge, multiple pulsing ignition systems, with about ten turns of primary (1) wire (Np) and about five hundred fifty turns of secondary (2) wire (Ns) for an input voltage Vp of approximately 350 volts and a peak output voltage Vs of 30 kV, the core and windings of the coil featuring separate and different primary (31) and secondary (41) core halves structured on the basis of herein developed coil open and closed circuit criteria such that the core half (31) containing the primary winding has a large center post (32) of cross-sectional area Ap with a narrow slot of width W1 around the post (32) for winding the primary wire (1) to provide essentially the total required coil leakage inductance Lpe of about 50 uH for an input capacitance of about 5 uF and spark discharge frequency fcc of about 10 kHz, and the secondary core (41) structured to have a center post (42) of cross-sectional area As about half that of Ap

Abstract: A gate charge recovery circuit prevents generation of the voltage spike that would otherwise appear across the sense resistor that is employed to detect the current flowing through the switched terminal of a gate-driven semiconductor device when the device is turned on. The gate charge recovery circuit comprises the combination of a capacitor connected between the reference terminal of the semiconductor device and the positive terminal of a driver and a filter resistor connected between the positive terminal of the driver and the positive terminal of a voltage source.

Abstract: The addition of an external commutating inductor and two clamp diodes to the phase-shifted PWM full-bridge dc/dc converter substantially reduces the switching losses of the transistors and the rectifier diodes, under all loading conditions. We give analyses, practical design considerations, and experimental results for a 1.5-kW converter with 60-V, 25-A output, operating at 100-kHz clock frequency and 95% efficiency.

Abstract: An N-phase switching voltage regulator includes N current sensing elements which carry respective phase currents. The voltages present at the switch node sides of the sensing elements are summed and presented to an amplifier which also receives the regulator's output voltage, to produce an output which is proportional to the regulator's total output current Iout. The invention also provides a means for direct insertion of total inductor output current information into a regulator's voltage-mode control loop, to provide active voltage positioning (AVP) for the output voltage. A voltage based on total inductor output current is summed with the regulator's reference voltage; this sum and Vout are applied to the voltage control error amplifier, the output of which is processed to operate the regulator's switches. This enables the regulator's output to have a desired droop impedance and to provide AVP of Vout as a function of total filtered inductor output current Iout(fltr).