Patents by Inventor Richard Reingruber

Richard Reingruber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Package stacking using chip to wafer bonding
    Patent number: 11955462
    Abstract: Embodiments are generally directed to package stacking using chip to wafer bonding. An embodiment of a device includes a first stacked layer including one or more semiconductor dies, components or both, the first stacked layer further including a first dielectric layer, the first stacked layer being thinned to a first thickness; and a second stacked layer of one or more semiconductor dies, components, or both, the second stacked layer further including a second dielectric layer, the second stacked layer being fabricated on the first stacked layer.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Georg Seidemann, Klaus Reingruber, Christian Geissler, Sven Albers, Andreas Wolter, Marc Dittes, Richard Patten
  • Data-flow based post pass optimization in dynamic compilers
    Patent number: 7721275
    Abstract: A system and method to perform post pass optimizations in a dynamic compiling environment. A dynamic compiler emits machine code. Responsive to the emission of the machine code a post pass processor creates an abstract representation of the code from the dynamic compiler. Data flow analysis is then conducted on the abstract representation. Redundant instructions in the machine code are identified and eliminated as a result of the data flow analysis.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: May 18, 2010
    Assignee: SAP AG
    Inventors: Daniel Kestner, Mirko Luedde, Richard Reingruber, Holger Stasch, Stephan Wilhelm
  • Data-flow based post pass optimization in dynamic compilers
    Publication number: 20050257202
    Abstract: A system and method to perform post pass optimizations in a dynamic compiling environment. A dynamic compiler emits machine code. Responsive to the emission of the machine code a post pass processor creates an abstract representation of the code from the dynamic compiler. Data flow analysis is then conducted on the abstract representation. Redundant instructions in the machine code are identified and eliminated as a result of the data flow analysis.
    Type: Application
    Filed: May 14, 2004
    Publication date: November 17, 2005
    Inventors: Daniel Kaestner, Mirko Luedde, Richard Reingruber, Holger Stasch, Stephan Wilhelm