Abstract: Disclosed herein are various exemplary mechanisms by which external forces applied to doors and their locking mechanisms are deflected or directed away from the critical components of the locking system thereby preserving the integrity of the locking system and preventing unauthorized entry. Detailed information on various example embodiments of the inventions are provided in the Detailed Description below, and the inventions are defined by the appended claims.

Abstract: A gun safe door storage system is permanently affixed to an interior surface of a gun safe door. The door storage system comprises a plurality of integrated pouches or pockets and a rack arranged such that the pouches or pockets are accessible even when the rack is holding rifles or rifle parts, such as barrels. Substantially all of the available space on the interior surface of the door is filled with pockets or pouches. The pouches or pockets are affixed to a backing material having strength and weight sufficient to prevent sagging. The backing material is permanently affixed to the interior surface of the gun safe door. The rack comprises a barrel support and a stock support mounted permanently on the interior surface of the gun safe door over the pouches or pockets.

Abstract: Disclosed herein are various exemplary mechanisms by which external forces applied to doors and their locking mechanisms are deflected or directed away from the critical components of the locking system thereby preserving the integrity of the locking system and preventing unauthorized entry. Detailed information on various example embodiments of the inventions are provided in the Detailed Description below, and the inventions are defined by the appended claims.

Abstract: A door-mounted rifle rack for use with a gun safe. The rifle rack has a stock support having one or more butt recesses located on a lower portion of an interior surface of the safe door. The butt recesses may be postioned at an angle to the interior surface of the safe door. A barrel support having one or more barrel holes is located on an upper portion of the interior surface of the safe door above the stock support. The barrel support, alternatively, may have one or more barrel recesses provided with barrel restraints instead of barrel holes.

Abstract: In order to detect a received signal quickly and reliably, an integrated circuit for detecting a received signal has an intermediate frequency detector which supplies a first search run stop signal if the intermediate frequency lies within a given range. Furthermore, a field-strength comparator is provided which supplies a second search run stop signal if the field-strength of the received signal exceeds a field-strength setpoint value. In addition, a multipath comparator is provided which supplies a third search run stop signal if the multipath signal exceeds a specific multipath setpoint value. The three search run stop signals are logically combined with one another by an AND gate and the result is made available as a static output signal and is provided as an input signal for a microprocessor.

Abstract: The receiver for various frequency bands has only one oscillator (OSZ), which is followed downstream by a frequency divider having a settable real divisor value. For generating the real divisor value, this frequency divider in turn has a multiplier with a settable integral multiplier value (M1) and a divider, downstream of the multiplier, with a settable integral divisor value (N1).

Abstract: A setting apparatus for setting the tuning voltage of a tunable resonant circuit has an amplification device which amplifies an oscillator tuning voltage, output by a phase locked loop, nonlinearly to produce the tuning voltage. The gain of the amplification device can be set by a digital gain control signal. The signal resolution of the setting apparatus can be controlled in different ways as a function of the gain by using two differently driven digital/analog converters.

Abstract: In order to detect a received signal quickly and reliably, an integrated circuit for detecting a received signal has an intermediate frequency detector which supplies a first search run stop signal if the intermediate frequency lies within a given range. Furthermore, a field-strength comparator is provided which supplies a second search run stop signal if the field-strength of the received signal exceeds a field-strength setpoint value. In addition, a multipath comparator is provided which supplies a third search run stop signal if the multipath signal exceeds a specific multipath setpoint value. The three search run stop signals are logically combined with one another by an AND gate and the result is made available as a static output signal and is provided as an input signal for a microprocessor.

Abstract: A PLL synthesizer circuit is disclosed having a programmable divider circuit driven by a controller (microprocessor) for selecting a desired output frequency (fVCO) of the PLL synthesizer circuit. An operating mode selector circuit optionally drives a receive operating mode and at least one further operating mode (frequency change operating mode) of the PLL synthesizer circuit. The PLL synthesizer circuit has a smaller settling time constant in the frequency change operating mode. The change into the frequency change operating mode is initiated by a detection of the drive of the programmable divider by means of a changed (new) drive value. The change from the frequency change operating mode into the receive operating mode is caused whenever the phase difference, that is to say the output signal of the phase detector falls below a predetermined threshold value.

Abstract: A circuit configuration for intermediate frequency demodulation for a video signal processing device includes an intermediate frequency filter to which an input signal converted to an intermediate frequency is delivered, and a mixer for demodulation with a simulated video carrier. In a further branch, the video carrier is eliminated from the input signal by a bandpass and converted in an oscillator into reference signals being mutually phase offset by 90.degree.. A phase tracker ensures that the phase and frequency of the simulated video carrier are correct relative to the signal to be demodulated. The phase tracker contains in each of two branches a mixer and a low pass, through which a component separation of the video signal to be demodulated is carried out. The reference signals are weighted in further mixers with determined equisignal components and combined into the simulated video carrier.

Abstract: A filter with adjustable edge steepness includes input terminals for applying a signal to be filtered. One of the input terminals is connected to a reference potential. A signal-forming device is connected to the input terminals for forming a first signal and a second signal from the signal to be filtered. The signal-forming device adjusts a difference between the first signal and the second signal. A subtraction device is connected to the signal-forming device for forming a differential signal from the first signal and the second signal. A frequency-dependent device has an input terminal connected to the subtraction device, an output terminal for supplying another signal, and a filter transfer characteristic to be delivered to the differential signal. An addition device has an output and is connected to the signal-forming device and to the output terminal of the frequency-dependent device for forming a summation signal at the output from the first signal and the other signal.

Abstract: A four-quadrant multiplier based on a Gilbert cell is utilized to multiply several signals by a similar signal. The transistors in two pairs of coupled differential amplifiers of one input terminal of the inner multiplier that is activated like a Gilbert cell by way of a diode-and-transistor section have several emitters. Each pair of emitters in the right and the left branch of the miltiplier can be oppositely activated by way of a source of variable current or by way of a series of a transistor and a source of current. To process square-wave signals, the source of variable current is a source that can be engaged and disengaged by I.sup.2 L gates.

Abstract: A method and circuit arrangement identifies the presence or absence of known frequencies in an input signal composed of a plurality of frequencies, whereby a frequency generator controlled by a reference frequency generates four switch signals having frequencies dependent upon the frequency to be identified and having a phase difference of 90.degree. and respectively one switch signal is mixed with the input signal in a respective mixer. The respective mixer products of two mixers are additively combined and are filtered through a respective filter for filtering AC components out, and the DC voltage component contained in the respective mixer product given the presence of the known frequency is evaluated with respect to the amplitude.

Abstract: A method and circuit for determining the presence or absence of a frequency of known value in an input signal composed of several frequencies employ a frequency generator, to which a stable reference signal is supplied, for generating two switching signals having a frequency which is the same as the known frequency and a phase difference of 90.degree.. The input signal is supplied to two mixers, to which the out-of-phase signals from the frequency generator are respectively supplied. The products of the two mixers are supplied to respective filters for filtering out ac components, and the respective amplitudes of the remaining dc voltage components of the respective mixed products are evaluated, the result of the evaluation indicating the presence or absence of the known frequency in the input signal.

Abstract: An integrable bipolar oscillator circuit, includes four transistors of the same conductivity type, four resistors, three constant current sources having base points and outputs, a reference potential terminal connected to the base points of each of the constant current sources, a supply potential terminal, and a frequency-determining feedback member, the output of the first constant current source being connected to the emitter of the first transistor and to the base of the second transistor, the output of the second constant current source being connected to the emitter of the third transistor and to the base of the fourth transistor, the emitters of the second and fourth transistors being connected to the output of the third constant current source through a given connection, the collectors of the first and third transistors being directly connected to the supply potential terminal, the first and second resistors each being connected between a respective one of the collectors of the second and fourth transi