Patents by Inventor Richard T. Beherns

Richard T. Beherns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5668678
    Abstract: A discrete time servo demodulation technique incorporated within a sampled amplitude read channel to demodulate embedded servo field information stored on a magnetic medium. The servo field information is transduced by a read head into an analog signal, and converted to a sequence of sample values in the read channel. The demodulation technique is responsive to the sample values and includes a discrete time peak detector for detecting servo data, and a discrete time servo burst amplitude detector for measuring the amplitude of servo bursts. Peaks are detected in the analog read signal by sensing a change of slope from the sequence of sample values. The peaks are qualified by polarity in that a peak is detected only if its polarity is opposite in sign from the previous peak. The servo burst amplitudes are measured by interpolating, rectifying, and accumulating the sequence of sample values corresponding to the servo bursts.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: September 16, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: David E. Reed, Richard T. Beherns, William G. Bliss
  • Patent number: 5572558
    Abstract: A PID filter employed in a timing recovery phase-locked loop (PLL) for synchronizing the sampling of a read signal from a magnetic read head in a sampled amplitude read channel for magnetic recording. In addition to a proportional and integral term, the PID filter comprises a derivative term to decrease the settling time of the PLL by increasing the phase margin and damping. Consequently, the PLL locks onto the acquisition preamble in a shorter period thereby reducing the necessary preamble length and maximizing storage area for user data. The derivative term of the loop filter is disabled during tracking mode in order to attenuate noise in the phase error and to reduce gain variance associated with tracking arbitrary user data. The structure of the PID loop filter is transformed into an alternative structure in order to minimize the computation path latency between delay registers to avoid limiting the speed of the read channel.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: November 5, 1996
    Assignee: Cirrus Logic, Inc.
    Inventor: Richard T. Beherns