Abstract: A method of fabricating a photonic device comprises the steps of providing a core pattern of waveguide core material (1) on a base layer (3) and applying a cladding layer (2) over the core material 1 and the base layer (3). The height of the surface of the cladding layer (2) over the base layer (3) varies in dependence on the pattern of core material (1). The core pattern is designed with at least two reference regions, each having a width w that is selected to provide a peak of the cladding layer (2) with a predetermined height h1 over each reference region. The core pattern is further designed such that a line between the peaks of the reference regions is higher than any intervening peaks of the cladding layer, whereby the peaks of the reference regions provide a vertical alignment reference.

Abstract: A method of fabricating a photonic device comprises the steps of providing a core pattern of waveguide core material (1) on a base layer (3) and applying a cladding layer (2) over the core material 1 and the base layer (3). The height of the surface of the cladding layer (2) over the base layer (3) varies in dependence on the pattern of core material (1). The core pattern is designed with at least two reference regions, each having a width w that is selected to provide a peak of the cladding layer (2) with a predetermined height hl over each reference region. The core pattern is further designed such that a line between the peaks of the reference regions is higher than any intervening peaks of the cladding layer, whereby the peaks of the reference regions provide a vertical alignment reference.

Abstract: A clock generation circuit for providing high-frequency scan testability with a low-speed tester includes a clock selector and control logic. The clock selector receives a reference clock signal and a high-frequency clock signal and produces an output signal selected from the reference clock signal and the high-frequency clock signal based on a clock selector control signal. The control logic that receives a capture signal and produces the clock selector control signal to modify the clock selector output signal in response to the capture signal. The clock selector output signal may be used to provide high-frequency scan testability with a low-speed tester.

Abstract: An arrow retention device is disclosed including a frame/guide which is attachable to a bow so as to limit the flight path of an arrow, a holding mechanism which is disposed along the frame/guide, and a release mechanism which selectively moves the holding mechanism between a closed position, wherein the holding mechanism holds the arrow, and an open position wherein the holding mechanism does not hold the arrow. The present invention includes an embodiment for use when assuming an overdraw position, and one which can be used with a conventional arrow. The mechanism simultaneously prevents an arrow from being knocked out of place and protects the user of the bow from injury.