Patents by Inventor Richard W. Schreyer
Richard W. Schreyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11676327Abstract: Techniques are disclosed relating to ray intersection in the context of motion blur. In some embodiments, a graphics processor includes time-oblivious ray intersect circuitry configured to receive coordinates for a ray and traverse a bounding volume hierarchy (BVH) data structure based on the coordinates to determine whether the ray intersects with one or more bounding regions of a graphics space. In some embodiments, in response to reaching a temporal branch element of the BVH data structure, the ray intersect circuitry initiates a shader program that determines a sub-tree of the BVH data structure for further traversal by the ray intersection circuitry, where the sub-tree corresponds to a portion of a motion-blur interval in which the ray falls. This may provide accurate ray tracing for motion blur while reducing area and power consumption of intersect circuitry, relative to time-aware implementations.Type: GrantFiled: March 18, 2021Date of Patent: June 13, 2023Assignee: Apple Inc.Inventors: Christopher A. Burns, Ali Rabbani Rankouhi, Justin A. Hensley, Richard W. Schreyer
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Publication number: 20220301254Abstract: Techniques are disclosed relating to ray intersection in the context of motion blur. In some embodiments, a graphics processor includes time-oblivious ray intersect circuitry configured to receive coordinates for a ray and traverse a bounding volume hierarchy (BVH) data structure based on the coordinates to determine whether the ray intersects with one or more bounding regions of a graphics space. In some embodiments, in response to reaching a temporal branch element of the BVH data structure, the ray intersect circuitry initiates a shader program that determines a sub-tree of the BVH data structure for further traversal by the ray intersection circuitry, where the sub-tree corresponds to a portion of a motion-blur interval in which the ray falls. This may provide accurate ray tracing for motion blur while reducing area and power consumption of intersect circuitry, relative to time-aware implementations.Type: ApplicationFiled: March 18, 2021Publication date: September 22, 2022Inventors: Christopher A. Burns, Ali Rabbani Rankouhi, Justin A. Hensley, Richard W. Schreyer
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Patent number: 11430174Abstract: Techniques are disclosed relating to specifying memory consistency constraints. In some embodiments, an instruction may specify, for a memory operation, a type of memory consistency and a scope at which to enforce the type of consistency. For example, these fields may specify whether to sequence memory accesses relative to the operation at one or more of multiple different cache levels based on the type of memory consistency and the scope.Type: GrantFiled: January 15, 2021Date of Patent: August 30, 2022Assignee: Apple Inc.Inventors: Terence M. Potter, Richard W. Schreyer, James J. Ding, Alexander K. Kan, Michael Imbrogno
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Publication number: 20210134045Abstract: Techniques are disclosed relating to specifying memory consistency constraints. In some embodiments, an instruction may specify, for a memory operation, a type of memory consistency and a scope at which to enforce the type of consistency. For example, these fields may specify whether to sequence memory accesses relative to the operation at one or more of multiple different cache levels based on the type of memory consistency and the scope.Type: ApplicationFiled: January 15, 2021Publication date: May 6, 2021Inventors: Terence M. Potter, Richard W. Schreyer, James J. Ding, Alexander K. Kan, Michael Imbrogno
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Patent number: 10949944Abstract: Systems, computer readable media, and methods for a unified programming interface and language are disclosed. In one embodiment, the unified programming interface and language assists program developers write multi-threaded programs that can perform both graphics and data-parallel compute processing on GPUs. The same GPU programming language model can be used to describe both graphics shaders and compute kernels, and the same data structures and resources may be used for both graphics and compute operations. Developers can use multithreading efficiently to create and submit command buffers in parallel.Type: GrantFiled: April 22, 2019Date of Patent: March 16, 2021Assignee: Apple Inc.Inventors: Richard W. Schreyer, Kenneth C. Dyke, Alexander K. Kan
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Patent number: 10930047Abstract: Techniques are disclosed relating to synchronizing access to pixel resources. Examples of pixel resources include color attachments, a stencil buffer, and a depth buffer. In some embodiments, hardware registers are used to track status of assigned pixel resources and pixel wait and pixel release instruction are used to synchronize access to the pixel resources. In some embodiments, other accesses to the pixel resources may occur out of program order. Relative to tracking and ordering pass groups, this weak ordering and explicit synchronization may improve performance and reduce power consumption. Disclosed techniques may also facilitate coordination between fragment rendering threads and auxiliary mid-render compute tasks.Type: GrantFiled: December 9, 2019Date of Patent: February 23, 2021Assignee: Apple Inc.Inventors: Terence M. Potter, Richard W. Schreyer, James J. Ding, Alexander K. Kan, Michael Imbrogno
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Patent number: 10747519Abstract: A compiler and library provide the ability to compile a programming language according to a defined language model into a programming language independent, machine independent intermediate representation, for conversion into an executable on a target programmable device. The language model allows writing programs that perform data-parallel graphics and non-graphics tasks.Type: GrantFiled: August 6, 2019Date of Patent: August 18, 2020Assignee: Apple Inc.Inventors: Aaftab A. Munshi, Kenneth C. Dyke, Rahul U. Joshi, Richard W. Schreyer
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Publication number: 20200167986Abstract: Techniques are disclosed relating to synchronizing access to pixel resources. Examples of pixel resources include color attachments, a stencil buffer, and a depth buffer. In some embodiments, hardware registers are used to track status of assigned pixel resources and pixel wait and pixel release instruction are used to synchronize access to the pixel resources. In some embodiments, other accesses to the pixel resources may occur out of program order. Relative to tracking and ordering pass groups, this weak ordering and explicit synchronization may improve performance and reduce power consumption. Disclosed techniques may also facilitate coordination between fragment rendering threads and auxiliary mid-render compute tasks.Type: ApplicationFiled: December 9, 2019Publication date: May 28, 2020Inventors: Terence M. Potter, Richard W. Schreyer, James J. Ding, Alexander K. Kan, Michael Imbrogno
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Patent number: 10504270Abstract: Techniques are disclosed relating to synchronizing access to pixel resources. Examples of pixel resources include color attachments, a stencil buffer, and a depth buffer. In some embodiments, hardware registers are used to track status of assigned pixel resources and pixel wait and pixel release instruction are used to synchronize access to the pixel resources. In some embodiments, other accesses to the pixel resources may occur out of program order. Relative to tracking and ordering pass groups, this weak ordering and explicit synchronization may improve performance and reduce power consumption. Disclosed techniques may also facilitate coordination between fragment rendering threads and auxiliary mid-render compute tasks.Type: GrantFiled: December 22, 2016Date of Patent: December 10, 2019Assignee: Apple Inc.Inventors: Terence M. Potter, Richard W. Schreyer, James J. Ding, Alexander K. Kan, Michael Imbrogno
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Publication number: 20190361687Abstract: A compiler and library provide the ability to compile a programming language according to a defined language model into a programming language independent, machine independent intermediate representation, for conversion into an executable on a target programmable device. The language model allows writing programs that perform data-parallel graphics and non-graphics tasks.Type: ApplicationFiled: August 6, 2019Publication date: November 28, 2019Inventors: Aaftab A. Munshi, Kenneth C. Dyke, Rahul U. Joshi, Richard W. Schreyer
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Patent number: 10445852Abstract: Techniques are disclosed relating to a hardware-supported flexible data structure for graphics processing. In some embodiments, dimensions of the data structure are configurable in an X direction, a Y direction, a number of samples per pixel, and an amount of data per sample. In some embodiments, these attributes are configurable using hardware registers. In some embodiments, the data structure is persistent across a tile being processed such that local memory context is accessible to both rendering threads of a render pass and mid-render compute threads.Type: GrantFiled: December 22, 2016Date of Patent: October 15, 2019Assignee: Apple Inc.Inventors: Terence M. Potter, Robert Kenney, Aaftab A. Munshi, Justin A. Hensley, Richard W. Schreyer
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Patent number: 10430169Abstract: A compiler and library provide the ability to compile a programming language according to a defined language model into a programming language independent, machine independent intermediate representation, for conversion into an executable on a target programmable device. The language model allows writing programs that perform data-parallel graphics and non-graphics tasks.Type: GrantFiled: February 20, 2015Date of Patent: October 1, 2019Assignee: Apple Inc.Inventors: Aaftab A. Munshi, Kenneth C. Dyke, Rahul U. Joshi, Richard W. Schreyer
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Publication number: 20190251656Abstract: Systems, computer readable media, and methods for a unified programming interface and language are disclosed. In one embodiment, the unified programming interface and language assists program developers write multi-threaded programs that can perform both graphics and data-parallel compute processing on GPUs. The same GPU programming language model can be used to describe both graphics shaders and compute kernels, and the same data structures and resources may be used for both graphics and compute operations. Developers can use multithreading efficiently to create and submit command buffers in parallel.Type: ApplicationFiled: April 22, 2019Publication date: August 15, 2019Inventors: Richard W. Schreyer, Kenneth C. Dyke, Alexander K. Kan
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Patent number: 10346941Abstract: Systems, computer readable media, and methods for a unified programming interface and language are disclosed. In one embodiment, the unified programming interface and language assists program developers write multi-threaded programs that can perform both graphics and data-parallel compute processing on GPUs. The same GPU programming language model can be used to describe both graphics shaders and compute kernels, and the same data structures and resources may be used for both graphics and compute operations. Developers can use multithreading efficiently to create and submit command buffers in parallel.Type: GrantFiled: September 30, 2014Date of Patent: July 9, 2019Assignee: Apple Inc.Inventors: Richard W. Schreyer, Kenneth C. Dyke, Alexander K. Kan
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Patent number: 10223822Abstract: Techniques are disclosed relating to performing mid-render auxiliary compute tasks for graphics processing. In some embodiments, auxiliary compute tasks are performed during a render pass, using at least a portion of a memory context of the render pass, without accessing a shared memory during the render pass. Relative to flushing render data to shared memory to perform compute tasks, this may reduce memory accesses and/or cache thrashing, which may in turn increase performance and/or reduce power consumption.Type: GrantFiled: December 22, 2016Date of Patent: March 5, 2019Assignee: Apple Inc.Inventors: Terence M. Potter, Ralph C. Taylor, Richard W. Schreyer, Aaftab A. Munshi, Justin A. Hensley
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Publication number: 20180182153Abstract: Techniques are disclosed relating to performing mid-render auxiliary compute tasks for graphics processing. In some embodiments, auxiliary compute tasks are performed during a render pass, using at least a portion of a memory context of the render pass, without accessing a shared memory during the render pass. Relative to flushing render data to shared memory to perform compute tasks, this may reduce memory accesses and/or cache thrashing, which may in turn increase performance and/or reduce power consumption.Type: ApplicationFiled: December 22, 2016Publication date: June 28, 2018Inventors: Terence M. Potter, Ralph C. Taylor, Richard W. Schreyer, Aaftab A. Munshi, Justin A. Hensley
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Publication number: 20180182058Abstract: Techniques are disclosed relating to a hardware-supported flexible data structure for graphics processing. In some embodiments, dimensions of the data structure are configurable in an X direction, a Y direction, a number of samples per pixel, and an amount of data per sample. In some embodiments, these attributes are configurable using hardware registers. In some embodiments, the data structure is persistent across a tile being processed such that local memory context is accessible to both rendering threads of a render pass and mid-render compute threads.Type: ApplicationFiled: December 22, 2016Publication date: June 28, 2018Inventors: Terence M. Potter, Robert Kenney, Aaftab A. Munshi, Justin A. Hensley, Richard W. Schreyer
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Publication number: 20180182154Abstract: Techniques are disclosed relating to synchronizing access to pixel resources. Examples of pixel resources include color attachments, a stencil buffer, and a depth buffer. In some embodiments, hardware registers are used to track status of assigned pixel resources and pixel wait and pixel release instruction are used to synchronize access to the pixel resources. In some embodiments, other accesses to the pixel resources may occur out of program order. Relative to tracking and ordering pass groups, this weak ordering and explicit synchronization may improve performance and reduce power consumption. Disclosed techniques may also facilitate coordination between fragment rendering threads and auxiliary mid-render compute tasks.Type: ApplicationFiled: December 22, 2016Publication date: June 28, 2018Inventors: Terence M. Potter, Richard W. Schreyer, James J. Ding, Alexander K. Kan, Michael Imbrogno
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Patent number: 9952655Abstract: In one embodiment, a system controls a duty cycle of a processor (e.g. a graphics processing unit (GPU)) to manage power. The GPU may include a snoop indicator that may control whether or not the GPU captures and/or responds to communications from another processor (e.g. a central processing unit (CPU) that executes a driver associate with the GPU). A snooze indicator may control whether or not the GPU is automatically repowered at the start of the next frame, or is repowered only if the communication indicating additional work has been received. In an embodiment, the GPU mode controls discussed above may permit the GPU firmware executed with the GPU itself to control duty cycle power down, independent of the driver executing on the CPU.Type: GrantFiled: June 9, 2016Date of Patent: April 24, 2018Assignee: Apple Inc.Inventors: Jason P. Jane, Richard W. Schreyer, Michael J. E. Swift, Gokhan Avkarogullari, Luc R. Semeria, Patrick Y. Law
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Patent number: 9390461Abstract: In one embodiment, a system controls a duty cycle of a processor (e.g. a graphics processing unit (GPU)) to manage power. The GPU may include a snoop indicator that may control whether or not the GPU captures and/or responds to communications from another processor (e.g. a central processing unit (CPU) that executes a driver associate with the GPU). A snooze indicator may control whether or not the GPU is automatically repowered at the start of the next frame, or is repowered only if the communication indicating additional work has been received. In an embodiment, the GPU mode controls discussed above may permit the GPU firmware executed with the GPU itself to control duty cycle power down, independent of the driver executing on the CPU.Type: GrantFiled: May 8, 2012Date of Patent: July 12, 2016Assignee: Apple Inc.Inventors: Jason P. Jane, Richard W. Schreyer, Michael J. E. Swift, Gokhan Avkarogullari, Luc R. Semeria, Patrick Y. Law