Patents by Inventor Ritesh Mittal

Ritesh Mittal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230342283
    Abstract: A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Inventors: Gagan Vishal Jain, Johnson Adaikalasamy, Alexander John Wakefield, Ritesh Mittal, Solaiman Rahim, Olivier Coudert
  • Patent number: 11726899
    Abstract: A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: August 15, 2023
    Assignee: Synopsys, Inc.
    Inventors: Gagan Vishal Jain, Johnson Adaikalasamy, Alexander John Wakefield, Ritesh Mittal, Solaiman Rahim, Olivier Coudert
  • Publication number: 20220066909
    Abstract: A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.
    Type: Application
    Filed: November 11, 2021
    Publication date: March 3, 2022
    Inventors: Gagan Vishal Jain, Johnson Adaikalasamy, Alexander John Wakefield, Ritesh Mittal, Solaiman Rahim, Olivier Coudert
  • Patent number: 11200149
    Abstract: A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: December 14, 2021
    Assignee: Synopsys, Inc.
    Inventors: Gagan Vishal Jain, Johnson Adaikalasamy, Alexander John Wakefield, Ritesh Mittal, Solaiman Rahim, Olivier Coudert
  • Publication number: 20180137031
    Abstract: A process is disclosed to identify the minimal set of sequential and combinational signals needed to fully reconstruct the combinational layout after emulation is complete. A minimal subset of sequential and combinational elements is output from the emulator to maximize the emulator speed and limit the utilization of emulator resources, e.g., FPGA resources. An efficient reconstruction of combinational waveforms or SAIF data is performed using a parallel computing grid.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 17, 2018
    Inventors: Gagan Vishal Jain, Johnson Adaikalasamy, Alexander John Wakefield, Ritesh Mittal, Solaiman Rahim, Olivier Coudert
  • Publication number: 20140298281
    Abstract: System-on-chip (SoC) designs include large amounts of interconnected intellectual property blocks and standard-cell logic using complex bus fabrics. Today SoC design-closure that validates design targets of area, timing, congestion and power constraints is accomplished post routing as over 80% of validation problems are due to global-interconnect. A method is disclosed that allows the designers to achieve global design-closure and physical topology constraints, early in the design cycle, at much higher levels of abstraction. In particular, logic hierarchy of the design is converted into a physical hierarchy of functional-related clusters of locally-connected logic. The clusters and inter-cluster global connections can be refined to meet design constraints in order to generate a top-level floor-plan in the form of library and constraint files.
    Type: Application
    Filed: October 16, 2013
    Publication date: October 2, 2014
    Applicant: Atrenta, Inc.
    Inventors: Ravi Varadarajan, Jitendra Gupta, Sanjiv Mathur, Priyank Mittal, Kaushal Kishore Pathak, Kshitiz Krishna, Anup Nagrath, Ritesh Mittal
  • Patent number: 8846899
    Abstract: Disclosed are saccharide and phosphocholine derivatives. The derivatives include azide and alkyne derivatives which form one end of a variable length carbon chain. The opposite end of the variable length carbon chain is covalently linked to the saccharide or phosphocholine. The saccharide may be, for instance, a maltoside. The alkyne and azide derivatives of the saccharides and phosphocholine may be reacted together to form amphiphilic molecules useful in cellular membrane studies and applications. By adjusting the length of the carbon chain, the biochemical and biophysical properties of the resultant 1,4-disubstituted 1,2,3-triazole compounds may be custom tailored for the intended application. Resultant molecules may form micelles, bicelle, lipid bilayers and other like structures useful in the isolation and purification of membrane bound or membrane associated proteins and biochemical components.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: September 30, 2014
    Assignee: Anatrace Products, LLC
    Inventors: Benjamin R. Travis, Ritesh Mittal, Lijun Huang, Liang Tang
  • Patent number: 8839171
    Abstract: System-on-chip (SoC) designs include large amounts of interconnected intellectual property blocks and standard-cell logic using complex bus fabrics. Today SoC design-closure that validates design targets of area, timing, congestion and power constraints is accomplished post routing as over 80% of validation problems are due to global-interconnect. A method is disclosed that allows the designers to achieve global design-closure and physical topology constraints, early in the design cycle, at much higher levels of abstraction. In particular, logic hierarchy of the design is converted into a physical hierarchy of functional-related clusters of locally-connected logic. The clusters and inter-cluster global connections can be refined to meet design constraints in order to generate a top-level floor-plan in the form of library and constraint files.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: September 16, 2014
    Assignee: Atrenta, Inc.
    Inventors: Ravi Varadarajan, Jitendra Gupta, Sanjiv Mathur, Priyank Mittal, Kaushal Kishore Pathak, Kshitiz Krishna, Anup Nagrath, Ritesh Mittal
  • Publication number: 20140200171
    Abstract: Disclosed are cleaning solutions. More particularly, non-toxic solutions of base, water, alcohol and detergent, that effectively and surprisingly eliminate contaminating aliphatic acids in aqueous solutions. When present as a foam or even a contaminating film remaining on various parts and surfaces, aliphatic acid contaminants can be present a large and costly problem in manufacturing operations, cleaning tasks, personal hygiene. The need to remove such contaminants arises in a myriad environments and situations, such as during the manufacture of detergents, pharmaceuticals, consumer products, coring and core analysis, manipulation of oils, fuels, fermentation applications, manufacture of emollients, moisturizers, liquors, foods such as seafood, milk, butter and other dairy products, water processing, paper products, tissue culture, reusable clinical equipment, and the like.
    Type: Application
    Filed: November 14, 2013
    Publication date: July 17, 2014
    Inventors: Benjamin R. Travis, Ritesh Mittal, Seth M. Huff, Lijun Huang, Liang Tang
  • Patent number: 8609602
    Abstract: Disclosed are cleaning solutions. More particularly, non-toxic solutions of base, water, alcohol and detergent, that effectively and surprisingly eliminate contaminating aliphatic acids in aqueous solutions. When present as a foam or even a contaminating film remaining on various parts and surfaces, aliphatic acid contaminants can be present a large and costly problem in manufacturing operations, cleaning tasks, personal hygiene. The need to remove such contaminants arises in a myriad environments and situations, such as during the manufacture of detergents, pharmaceuticals, consumer products, coring and core analysis, manipulation of oils, fuels, fermentation applications, manufacture of emollients, moisturizers, liquors, foods such as seafood, milk, butter and other dairy products, water processing, paper products, tissue culture, reusable clinical equipment, and the like.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: December 17, 2013
    Assignee: Anatrace Products, LLC
    Inventors: Benjamin R. Travis, Ritesh Mittal, Seth M. Huff, Lijun M. Huang, Liang Tang
  • Publication number: 20130096295
    Abstract: Disclosed are saccharide and phosphocholine derivatives. The derivatives include azide and alkyne derivatives which form one end of a variable length carbon chain. The opposite end of the variable length carbon chain is covalently linked to the saccharide or phosphocholine. The saccharide may be, for instance, a maltoside. The alkyne and azide derivatives of the saccharides and phosphocholine may be reacted together to form amphiphilic molecules useful in cellular membrane studies and applications. By adjusting the length of the carbon chain, the biochemical and biophysical properties of the resultant 1,4-disubstituted 1,2,3-triazole compounds may be custom tailored for the intended application. Resultant molecules may form micelles, bicelle, lipid bilayers and other like structures useful in the isolation and purification of membrane bound or membrane associated proteins and biochemical components.
    Type: Application
    Filed: October 12, 2011
    Publication date: April 18, 2013
    Applicant: AFFYMETRIX, INC.
    Inventors: Benjamin R. Travis, Ritesh Mittal, Lijun Huang, Liang Tang
  • Publication number: 20120015862
    Abstract: Disclosed are cleaning solutions. More particularly, non-toxic solutions of base, water, alcohol and detergent, that effectively and surprisingly eliminate contaminating aliphatic acids in aqueous solutions. When present as a foam or even a contaminating film remaining on various parts and surfaces, aliphatic acid contaminants can be present a large and costly problem in manufacturing operations, cleaning tasks, personal hygiene. The need to remove such contaminants arises in a myriad environments and situations, such as during the manufacture of detergents, pharmaceuticals, consumer products, coring and core analysis, manipulation of oils, fuels, fermentation applications, manufacture of emollients, moisturizers, liquors, foods such as seafood, milk, butter and other dairy products, water processing, paper products, tissue culture, reusable clinical equipment, and the like.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 19, 2012
    Applicant: AFFYMETRIX, INC.
    Inventors: Benjamin R. Travis, Ritesh Mittal, Seth M. Huff, Lijun M. Huang, Liang Tang
  • Patent number: D766272
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: September 13, 2016
    Assignee: EXLSERVICE HOLDINGS, INC.
    Inventors: Ritesh Mittal, Benny Abraham, Mahnaz Khezrzadeh