Patents by Inventor Riyouichi Oota

Riyouichi Oota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of manufacturing the same
    Patent number: 6551862
    Abstract: A semiconductor device is disclosed, comprising a tape substrate which supports a semiconductor chip, an insulating adhesive layer disposed between the semiconductor chip and the tape substrate, an insulating sheet member laminated to the insulating adhesive layer and formed harder than the insulating adhesive layer, wires for connecting pads on the semiconductor chip with connecting terminals on the tape substrate, a sealing portion formed by sealing the semiconductor chip with resin, and plural solder balls provided on a back of the tape substrate. A die bonding layer for fixing the semiconductor chip thereto is composed of an insulating adhesive layer and the insulating sheet member laminated thereto. The die bonding layer is formed thick by such a multi-layer structure, whereby the resin balance of the surface and back of the semiconductor chip is improved to prevent warping of a package and improve the mounting temperature cyclicity and reflow characteristic.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: April 22, 2003
    Assignees: Hitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Riyouichi Oota, Tsugihiko Hirano, Atsushi Fujisawa, Takafumi Konno
  • Semiconductor device and method of manufacturing the same
    Publication number: 20020050642
    Abstract: A semiconductor device is disclosed, comprising a tape substrate which supports a semiconductor chip, an insulating adhesive layer disposed between the semiconductor chip and the tape substrate, an insulating sheet member laminated to the insulating adhesive layer and formed harder than the insulating adhesive layer, wires for connecting pads on the semiconductor chip with connecting terminals on the tape substrate, a sealing portion formed by sealing the semiconductor chip with resin, and plural solder balls provided on a back of the tape substrate. A die bonding layer for fixing the semiconductor chip thereto is composed of an insulating adhesive layer and the insulating sheet member laminated thereto. The die bonding layer is formed thick by such a multi-layer structure, whereby the resin balance of the surface and back of the semiconductor chip is improved to prevent warping of a package and improve the mounting temperature cyclicity and reflow characteristic.
    Type: Application
    Filed: October 18, 2001
    Publication date: May 2, 2002
    Inventors: Riyouichi Oota, Tsugihiko Hirano, Atsushi Fujisawa, Takafumi Konno