Patents by Inventor Robert A. Cargnoni

Robert A. Cargnoni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts
    Patent number: 5682492
    Abstract: A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report termination information back to the decoder logic, but do not irrevocably change the state of the machine. Based on the termination information, the decoder logic retires normally terminated operations in order. If an operation terminates abnormally, the decoder logic instructs the units to back out of those operations that include and are later than the operation that terminated abnormally.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: October 28, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Harold L. McFarland, David R. Stiles, Korbin S. Van Dyke, Shrenik Mehta, John Gregory Favor, Dale R. Greenley, Robert A. Cargnoni
  • Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts
    Patent number: 5442757
    Abstract: A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report termination information back to the decoder logic, but do not irrevocably change the state of the machine. Based on the termination information, the decoder logic retires normally terminated operations in order. If an operation terminates abnormally, the decoder logic instructs the units to back out of those operations that include and are later than the operation that terminated abnormally.
    Type: Grant
    Filed: March 3, 1993
    Date of Patent: August 15, 1995
    Assignee: NexGen, Inc.
    Inventors: Harold L. McFarland, David R. Stiles, Korbin S. Van Dyke, Shrenik Mehta, John G. Favor, Dale R. Greenley, Robert A. Cargnoni
  • Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags
    Patent number: 5226126
    Abstract: A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report termination information back to the decoder logic, but do not irrevocably change the state of the machine. Based on the termination information, the decoder logic retires normally terminated operations in order. If an operation terminates abnormally, the decoder logic instructs the units to back out of those operations that include and are later than the operation that terminated abnormally.
    Type: Grant
    Filed: February 21, 1990
    Date of Patent: July 6, 1993
    Assignee: Nexgen Microsystems
    Inventors: Harold L. McFarland, David R. Stiles, Korbin S. Van Dyke, Shrenik Mehta, John G. Favor, Dale R. Greenley, Robert A. Cargnoni