Patents by Inventor Robert A. Conte

Robert A. Conte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105802
    Abstract: Integrated circuit structures having gate cut plugs removed from trench contacts, and methods of fabricating integrated circuit structures having gate cut plugs removed from trench contacts, are described. For example, an integrated circuit structure includes a vertical stack of horizontal nanowires. A gate electrode is over the vertical stack of horizontal nanowires. A conductive trench contact is adjacent to the gate electrode. A dielectric sidewall spacer is between the gate electrode and the conductive trench contact. A gate cut plug extends through the gate electrode and the dielectric sidewall spacer. The gate cut plug extends into but not entirely through the conductive trench contact.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Leonard P. GULER, Marie CONTE, Charles H. WALLACE, Robert JOACHIM, Shengsi LIU, Saurabh ACHARYA, Nidhi KHANDELWAL, Kyle T. HORAK, Robert ROBINSON, Brandon PETERS
  • Publication number: 20240095638
    Abstract: A software product, system and method for a user to set and track lifestyle goals and related activities while collecting memories data along the way, and for a business, to gather and aggregate statistics about the user's lifestyle choices and offer access to the users lifestyle choices for a fee; comprising; matching the following through the internet; consumers and brands that interact together, through social media; the user managing receipts & expenses, goal setting and budgeting; brands to increase consumer loyalty and market awareness; organizing the user life, memories; and assisting the business to organize, market, and advertise and meet business goals.
    Type: Application
    Filed: July 30, 2018
    Publication date: March 21, 2024
    Inventor: Robert Conte
  • Patent number: 11927455
    Abstract: The present disclosure is directed toward systems and methods for an augmented reality transportation system. For example, the systems and methods described herein present an augmented reality environment for a driver or a passenger including augmented reality elements to mark specific locations within a display of real-world surroundings. Additionally, the systems and methods described herein analyze historical information to determine placements for augmented reality elements. The systems and methods also enable a user to share an augmented reality or virtual reality environment with another user.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: March 12, 2024
    Assignee: Lyft, Inc.
    Inventors: Ethan Duncan Eyler, Martin Conte MacDonell, Taggart Matthiesen, Jesse Jones McMillin, Robert Earl Rasmusson, Jr., Mark David Teater
  • Publication number: 20220239584
    Abstract: A sending node may send a network message to a multicast IP address. The sending node and a recipient node may be in communication via a plurality of intermediary nodes. The recipient node may receive a number of copies of the network message that corresponds to a number of equal cost paths between the sending node and the recipient node. The recipient node may send a reply to each of the copies of the network message to the sending node. The sending node may provide the replies to a collector module, which may use the replies for network analytics, network monitoring, machine learning, and the like.
    Type: Application
    Filed: January 25, 2021
    Publication date: July 28, 2022
    Inventors: Alankar Sharma, Priya Kanago, Charles Robert Conte, Saurabh C. Shah
  • Publication number: 20210082868
    Abstract: A method of joining a surface-mount component to a substrate includes placing a piece of solder on top of the substrate and temporarily bonding the piece of solder to the substrate with at least one temporary bond. The method also includes placing a surface-mount component on top of the substrate with a bottom face of the surface-mount component facing the substrate. The surface-mount component has at least one lateral side. The method further includes positioning the surface-mount component with the at least one lateral side proximate the piece of solder, heating the substrate and the piece of solder to a joining temperature for a time sufficient for the solder to flow into an area between the bottom face of the surface-mount component and the substrate, and cooling the substrate and solder.
    Type: Application
    Filed: December 1, 2020
    Publication date: March 18, 2021
    Inventors: Robert Conte, Dennis Zegzula, Ching Au
  • Patent number: 10879211
    Abstract: A method of joining a surface-mount component to a substrate includes placing a piece of solder on top of the substrate and temporarily bonding the piece of solder to the substrate with at least one temporary bond. The method also includes placing a surface-mount component on top of the substrate with a bottom face of the surface-mount component facing the substrate. The surface-mount component has at least one lateral side. The method further includes positioning the surface-mount component with the at least one lateral side proximate the piece of solder, heating the substrate and the piece of solder to a joining temperature for a time sufficient for the solder to flow into an area between the bottom face of the surface-mount component and the substrate, and cooling the substrate and solder.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: December 29, 2020
    Assignee: R.S.M. Electron Power, Inc.
    Inventors: Robert Conte, Dennis Zegzula, Ching Au
  • Publication number: 20180082975
    Abstract: A method of joining a surface-mount component to a substrate includes placing a piece of solder on top of the substrate and temporarily bonding the piece of solder to the substrate with at least one temporary bond. The method also includes placing a surface-mount component on top of the substrate with a bottom face of the surface-mount component facing the substrate. The surface-mount component has at least one lateral side. The method further includes positioning the surface-mount component with the at least one lateral side proximate the piece of solder, heating the substrate and the piece of solder to a joining temperature for a time sufficient for the solder to flow into an area between the bottom face of the surface-mount component and the substrate, and cooling the substrate and solder.
    Type: Application
    Filed: December 8, 2016
    Publication date: March 22, 2018
    Inventors: Robert Conte, Dennis Zegzula, Ching Au
  • Patent number: 9558859
    Abstract: The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion, thus greatly improve the reliability of electronic packages. The slip layer substrate comprises: a base material; a first metallization layer formed on the base material; a first diffusion barrier layer formed on the first metallization layer; a slip layer formed on the first diffusion barrier layer; a second diffusion barrier layer formed on the slip layer; and a second metallization layer formed on the second diffusion barrier layer.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: January 31, 2017
    Assignee: RSM ELECTRON POWER, INC.
    Inventors: Ching Au, Manhong Zhao, Robert Conte
  • Publication number: 20150237724
    Abstract: The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion, thus greatly improve the reliability of electronic packages. The slip layer substrate comprises: a base material; a first metallization layer formed on the base material; a first diffusion barrier layer formed on the first metallization layer; a slip layer formed on the first diffusion barrier layer; a second diffusion barrier layer formed on the slip layer; and a second metallization layer formed on the second diffusion barrier layer.
    Type: Application
    Filed: February 18, 2014
    Publication date: August 20, 2015
    Applicant: RSM Electron Power, Inc.
    Inventors: Ching Au, Manhong Zhao, Robert Conte
  • Publication number: 20040150956
    Abstract: A heat sink comprises pins, located in a holding base plate, that are positioned so that the end of each pin is exposed and attached by a thermally conductive material to a heat generating source, such as an internal electronic insulator assembly or a semiconductor die. The pins have various diameters and shapes, such as circular, square, diamond, helical, elliptical, triangular and rectangular that can be made from any thermally conductive material, such as metals, ceramics, organic and inorganic compounds. The pins are located inside a holding base plate that can comprise a medium that will support the structure, such as metals, plastics, ceramics, polymeric, organic and inorganic compounds. The pins are arranged in a geometric pattern of any design shape, repetition of such patterns and concentration of such patterns. The ends of the pins can be straight flat cut or of nail head design.
    Type: Application
    Filed: January 22, 2004
    Publication date: August 5, 2004
    Inventor: Robert Conte
  • Patent number: 6647357
    Abstract: A method for correcting reciprocity error in two port network measurements, in which an iterative algorithm is used to obtain an optimal symmetric matrix approximation to a measured 2×2 reciprocal network. The algorithm smooths measured data to obtain a low noise floor on measurements related to mode conversion in cables and connecting hardware. A geometric interpretation is used to approximate a measured data vector with the closest vector which satisfies the reciprocity constraint. An initial point in the constraint surface (reciprocity manifold) is located, and another point which is a better approximation of the measured data vector which satisfies the reciprocity constraint is generated. By repeating this process, the closest point in the manifold is quickly located. This closest point defines a reciprocal matrix which can be used to estimate the actual device under test (DUT) parameters.
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: November 11, 2003
    Assignee: Avaya Technology Corp.
    Inventor: Robert A. Conte
  • Patent number: 6571187
    Abstract: A calibration procedure for correcting two port frequency measurements. Calibration standards are initially connected to port one of a network analyzer and individually measured. This process is repeated with port two of the analyzer. A jumper which is used to bridge ports one and two is then connected to port one. At the far end of the jumper, three references are sequentially connected and the combination of the jumper and the terminations are measured. The raw data measured thus far is then processed to extract the two port electrical parameters of the jumper. The measured jumper is then bridged between ports one and two, and a series of measurements are made. Using the known electrical characteristics of the jumper, an intervening network is completely characterized and the measured SM and actual SA parameters of any device to be tested are relayed.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: May 27, 2003
    Assignee: Avaya Technology Corp.
    Inventor: Robert A. Conte
  • Patent number: 5420551
    Abstract: Disclosed is a circuit which permits transmission of broadband analog CATV video signals on unshielded twisted wire pairs. The circuit includes an autotransformer with a ground connection coupled to the node between two secondary windings. The two opposite ends of the secondary windings are coupled to a choke, which, in turn, is coupled to an isolation transformer with a center-tapped primary and secondary winding for shunting any remaining common-mode currents.
    Type: Grant
    Filed: June 29, 1994
    Date of Patent: May 30, 1995
    Assignee: AT&T Corp.
    Inventors: Robert A. Conte, William H. Georger
  • Patent number: 4862635
    Abstract: A snelled fishhook case has a spool and a sleeve that fit coaxially together, each being rotatable relative to the other about the common axis, with the sleeve positioned about the spool. A radial opening in the sleeve and an axial slit in the spool can be aligned in registry to provide radial access to a spool cavity that receives the whole hook portion of a snelled fishhook. An annular space is defined between the spool and the sleeve and extends axially opposite the sleeve opening. The leader portion of the snelled fishhook can be wound or unwound about the spool in the annular space covering the spool slit.
    Type: Grant
    Filed: May 4, 1988
    Date of Patent: September 5, 1989
    Inventor: Robert Conte