Patents by Inventor Robert A. Hinton

Robert A. Hinton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230274578
    Abstract: Systems and methods provide for intelligently switching between cloud processing mode and edge processing mode based on a variety of criteria, such as the desired eye-tracker settings (e.g., minimum tracker rate, ideal tracker rate, and processing mode) and the available network capabilities (e.g., latency, bandwidth, and the like). The criteria used for determining whether buffered cloud processing is viable include such parameters as upload bandwidth, tolerable processing delay, buffer drain rate, buffer fill rate, and maximum session duration. The cloud processing system may be used instead of available edge processing in cases where there are benefits to doing so, e.g., the cloud processing system provides added functionality, such as improved data analytics.
    Type: Application
    Filed: February 25, 2022
    Publication date: August 31, 2023
    Inventors: Caleb Robert Hinton, Miles Kirkland Manning, Robert Jacob Nelson
  • Patent number: 9146745
    Abstract: Methods and apparatus for partitioning a microprocessor pipeline to support pipelined branch prediction and instruction fetching of multiple execution threads. A thread selection stage selects a thread from a plurality of execution threads. In one embodiment, storage in a branch prediction output queue is pre-allocated to a portion of the thread in one branch prediction stage in order to prevent stalling of subsequent stages in the branch prediction pipeline. In another embodiment, an instruction fetch stage fetches instructions at a fetch address corresponding to a portion of the selected thread. Another instruction fetch stage stores the instruction data in an instruction fetch output queue if enough storage is available. Otherwise, instruction fetch stages corresponding to the selected thread are invalidated and refetched to avoid stalling preceding stages in the instruction fetch pipeline, which may be fetching instructions of another thread.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: September 29, 2015
    Assignee: Intel Corporation
    Inventors: Stephan Jourdan, Robert Hinton
  • Patent number: 7454596
    Abstract: Methods and apparatus for partitioning a microprocessor pipeline to support pipelined branch prediction and instruction fetching of multiple execution threads. A thread selection stage selects a thread from a plurality of execution threads. In one embodiment, storage in a branch prediction output queue is pre-allocated to a portion of the thread in one branch prediction stage in order to prevent stalling of subsequent stages in the branch prediction pipeline. In another embodiment, an instruction fetch stage fetches instructions at a fetch address corresponding to a portion of the selected thread. Another instruction fetch stage stores the instruction data in an instruction fetch output queue if enough storage is available. Otherwise, instruction fetch stages corresponding to the selected thread are invalidated and refetched to avoid stalling preceding stages in the instruction fetch pipeline, which may be fetching instructions of another thread.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: November 18, 2008
    Assignee: Intel Corporation
    Inventors: Stephan Jourdan, Robert Hinton
  • Publication number: 20080072024
    Abstract: Methods and apparatus to perform efficient branch prediction operations are described. In one embodiment, branch prediction may be performed by utilizing a combination of a bimodal predictor, a plurality of global predictors, and a loop predictor. Other embodiments are also described.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 20, 2008
    Inventors: Mark C. Davis, Robert Hinton, Boyd Phelps
  • Patent number: 7320790
    Abstract: Humanized forms of mouse antibody 10D5 that retain the binding properties of mouse 10D5 are disclosed. Also disclosed are processes for making the humanized antibody, intermediates for making the humanized antibodies, including, nucleotide sequences, vectors, transformed host cells, and methods of using the humanized antibody to treat, prevent, alleviate, reverse, or otherwise ameliorate symptoms or pathology or both, that are associated with Down's syndrome or pre-clinical or clinical Alzheimer's disease or cerebral amyloid angiopathy.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: January 22, 2008
    Assignee: Eli Lilly and Company
    Inventors: Paul Robert Hinton, Maximiliano J. Vasquez
  • Publication number: 20080005534
    Abstract: Methods and apparatus for partitioning a microprocessor pipeline to support pipelined branch prediction and instruction fetching of multiple execution threads. A thread selection stage selects a thread from a plurality of execution threads. In one embodiment, storage in a branch prediction output queue is pre-allocated to a portion of the thread in one branch prediction stage in order to prevent stalling of subsequent stages in the branch prediction pipeline. In another embodiment, an instruction fetch stage fetches instructions at a fetch address corresponding to a portion of the selected thread. Another instruction fetch stage stores the instruction data in an instruction fetch output queue if enough storage is available. Otherwise, instruction fetch stages corresponding to the selected thread are invalidated and refetched to avoid stalling preceding stages in the instruction fetch pipeline, which may be fetching instructions of another thread.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 3, 2008
    Inventors: Stephan Jourdan, Robert Hinton
  • Publication number: 20080005544
    Abstract: Methods and apparatus for partitioning a microprocessor pipeline to support pipelined branch prediction and instruction fetching of multiple execution threads. A thread selection stage selects a thread from a plurality of execution threads. In one embodiment, storage in a branch prediction output queue is pre-allocated to a portion of the thread in one branch prediction stage in order to prevent stalling of subsequent stages in the branch prediction pipeline. In another embodiment, an instruction fetch stage fetches instructions at a fetch address corresponding to a portion of the selected thread. Another instruction fetch stage stores the instruction data in an instruction fetch output queue if enough storage is available. Otherwise, instruction fetch stages corresponding to the selected thread are invalidated and refetched to avoid stalling preceding stages in the instruction fetch pipeline, which may be fetching instructions of another thread.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 3, 2008
    Inventors: Stephan Jourdan, Robert Hinton
  • Publication number: 20050193278
    Abstract: Systems and methods of managing threads provide for supporting a plurality of logical threads with a plurality of simultaneous physical threads in which the number of logical threads may be greater than or less than the number of physical threads. In one approach, each of the plurality of logical threads is maintained in one of a wait state, an active state, a drain state, and a stall state. A state machine and hardware sequencer can be used to transition the logical threads between states based on triggering events and whether or not an interruptible point has been encountered in the logical threads. The logical threads are scheduled on the physical threads to meet, for example, priority, performance or fairness goals. It is also possible to specify the resources that are available to each logical thread in order to meet these and other, goals. In one example, a single logical thread can speculatively use more than one physical thread, pending a selection of which physical thread should be committed.
    Type: Application
    Filed: December 29, 2003
    Publication date: September 1, 2005
    Inventors: Per Hammarlund, Stephan Jourdan, Pierre Michaud, Alexandre Farcy, Morris Marden, Robert Hinton, Douglas Carmean
  • Publication number: 20050149696
    Abstract: Rather than steering one macroinstruction at a time to decode logic in a processor, multiple macroinstructions may be steered at any given time. In one embodiment, a pointer calculation unit generates a pointer that assists in determining a stream of one or more macroinstructions that may be steered to decode logic in the processor.
    Type: Application
    Filed: December 29, 2003
    Publication date: July 7, 2005
    Inventors: Robert Hinton, Stephan Jourdan, Alexandre Farcy
  • Patent number: 5081790
    Abstract: A self-maintenance planter device for the purpose of supporting, nurturing, watering, and feeding a plant organism is disclosed. The planter includes the components of a water/absorbent reservoir, a soil support plate, a water addition tube and cap, and one or more conduit wicks to accomodate bidirectional water flow between the water/adsorbent reservoir and the potting soil. The planter device is constructed to promote time periods of reversed water flow from the potting soil through the conduit wicks to the water/absorbent reservoir. Various noxious substances such as mercaptans are flushed from the potting soil into the absorbent/water reservoir, and the noxious substances are physically or chemically absorbed into the absorbent substance, thereby providing a purified environment for nurture and sustenance of plant organisms for extended time intervals.
    Type: Grant
    Filed: May 24, 1988
    Date of Patent: January 21, 1992
    Inventor: Robert A. Hinton
  • Patent number: 4879075
    Abstract: An evaporative cooler apparatus and method of operation are disclosed. The invention was conceived and developed to humidify and cool the attic space between the roof and the ceiling of man-made buildings or other structures. The apparatus is comprised of an induced draft fan assembly which blows air through an evaporation bundle comprised of one or more concentric cylinders of fibrous evaporation pads. The most advantageous embodiments of the invention and optimum parameters of operation result in reduced costs for installation, for evaporation water, for electrical power, and for service and maintenance as compared with devices of the prior art.
    Type: Grant
    Filed: September 13, 1988
    Date of Patent: November 7, 1989
    Inventor: Robert A. Hinton
  • Patent number: 3977203
    Abstract: A gaseous stream (such as a "sour" natural gas stream) composed chiefly of a normally gaseous light hydrocarbon or alkane, such as methane, ethane, propane, or mixtures thereof, containing undesirable constituents, impurities or contaminants, such as carbon dioxide, hydrogen sulfide, water vapor, nitrogen and helium, is mixed with a polar organic liquid, such as methanol, or an aqueous solution of said liquid, such as an aqueous solution of methanol. The resulting mixture is cooled and liquefied and the resulting two-phase liquid mixture (comprising a light phase rich in the desired light hydrocarbon and an impurities-rich heavy phase of said polar organic liquid) is extracted with said polar organic liquid to recover said light hydrocarbon in the liquefied state, e.g. as liquefied, "sweet" natural gas.
    Type: Grant
    Filed: March 25, 1974
    Date of Patent: August 31, 1976
    Assignee: Kansas University Endowment Association
    Inventors: Robert A. Hinton, Fred Kurata