Patents by Inventor Robert A. Reece
Robert A. Reece has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11188702Abstract: Aspects of the present disclosure address systems and methods for local cluster refinement for integrated circuit (IC) designs using a dynamic weighting scheme. Initial cluster definitions are accessed. The initial cluster definitions define a plurality of clusters where each cluster includes a plurality of pins. Each cluster is evaluated with respect to one or more design rule constraints. Based on the evaluation, clusters are identified from the plurality of clusters. A set of refinement candidates are generated based on the one or more clusters. A scoring function that employs a dynamic weighting scheme is used to determine a refinement quality score for each refinement candidate in the set of candidates and one or more refinement candidates are selected from among the set of refinement candidates based on respective refinement quality scores. A refined clustering solution is generated based on the selected refinement candidates.Type: GrantFiled: December 31, 2020Date of Patent: November 30, 2021Assignee: Cadence Design Systems, Inc.Inventors: Bentian Jiang, Natarajan Viswanathan, William Robert Reece, Zhuo Li
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Patent number: 11163929Abstract: Various embodiments provide for clock network generation for a circuit design using an inverting integrated clock gate (ICG). According to some embodiments, a clock network with one or more inverting ICGs is generated, after a topology of the clock network is defined, by applying a non-inverting ICG-to-inverting ICG transform to one or more nodes of the clock network that comprise a non-inverting ICG. Additionally, according to some embodiments, a clock network is generated bottom-up (from the clock sinks to the root clock signal source) using one or more inverting ICGs.Type: GrantFiled: January 6, 2020Date of Patent: November 2, 2021Assignee: Cadence Design Systems, Inc.Inventors: William Robert Reece, Thomas Andrew Newton, Ruth Patricia Jackson, Zhuo Li
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Patent number: 11132490Abstract: Various embodiments provide for clock network generation for a circuit design using a negative-edge integrated clock gate (ICG). According to some embodiments, a clock network with one or more negative-edge ICGs is generated, after a topology of the clock network is defined, by applying a positive-edge ICG-to-negative-edge ICG transform to one or more nodes of the clock network that comprise a positive-edge ICG. Additionally, according to some embodiments, a clock network is generated bottom-up (from the clock sinks to the root clock signal source) using one or more negative-edge ICGs.Type: GrantFiled: January 6, 2020Date of Patent: September 28, 2021Assignee: Cadence Design Systems, Inc.Inventors: Ruth Patricia Jackson, William Robert Reece, Thomas Andrew Newton, Zhuo Li
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Patent number: 10990721Abstract: Electronic design automation systems, methods, and media are presented for cell cloning during circuit design. In one embodiment, for a circuit design comprising a plurality of flip-flop elements having clock inputs provided by a routing tree, a delay is identified for each flip-flop element. The flip-flop elements are clustered by delay to generate at least two clusters of flip-flop elements. Elements within the clusters are then grouped by physical characteristics to generate delay groups of flip-flop elements. An updated routing tree is then generated for the circuit design using the first delay group and the second delay group.Type: GrantFiled: December 17, 2019Date of Patent: April 27, 2021Assignee: Cadence Design Systems, Inc.Inventors: William Robert Reece, Thomas Andrew Newton, Zhuo Li
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Patent number: 10963618Abstract: Electronic design automation systems, methods, and media are presented for multi-dimension clock gate design in clock tree synthesis. In one embodiment, an input list of clock gate types is accessed, and the list is then used in generating a clock gate matrix. A circuit design with a clock tree is then accessed. The multi-dimensional design involves automatically selecting, for a first clock gate of the routing tree, a first clock gate type from the clock gate matrix based on a size and associated area for the first clock gate type to select a drive strength value for the first clock gate in the routing tree. The first clock gate is then resized to generate a resized first clock gate using the clock gate matrix to adjust a first delay value associated with the first clock gate while maintaining the drive strength value.Type: GrantFiled: January 6, 2020Date of Patent: March 30, 2021Assignee: Cadence Design Systems, Ine.Inventors: Amin Farshidi, William Robert Reece, Kwangsoo Han, Thomas Andrew Newton, Zhuo Li
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Patent number: 10963617Abstract: Aspects of the present disclosure address systems and methods for fixing clock tree design constraint violations. An initial clock tree is generated. The generating of the initial clock tree comprises routing a clock net using an initial value for a parameter that controls a priority ratio between total route length and a maximum source-to-sink route length in each net of the clock tree. A violation to a clock tree design constraint is detected in the clock net in the clock tree, and based on detecting the violation, a rerouting candidate is generated by rerouting the clock net using an adjusted value for the parameter. A target clock tree is selected based on a comparison of timing characteristics of the rerouting candidate with the clock tree design constraint.Type: GrantFiled: January 6, 2020Date of Patent: March 30, 2021Assignee: Cadence Design Systems, Inc.Inventors: Andrew Mark Chapman, William Robert Reece, Natarajan Viswanathan, Mehmet Can Yildiz, Gracieli Posser, Zhuo Li
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Patent number: 10740532Abstract: Aspects of the present disclosure address improved systems and methods for generating a clock tree based on route-driven placement of fan-out clock drivers. Consistent with some embodiments, a method may include constructing a spanning tree comprising one or more paths that interconnect a set of clock sinks of a clock net of an integrated circuit device design. The method further includes calculating a center of the set of the clock sinks based on clock sink locations in the integrated circuit device design and identifying a point on the spanning tree nearest to the center of the set of clock sinks. The method further includes generating a clock tree by placing a clock driver at the point on the spanning tree that is nearest to the center of the set of clock sinks.Type: GrantFiled: December 20, 2018Date of Patent: August 11, 2020Assignee: Cadence Design Systems, Inc.Inventors: William Robert Reece, Thomas Andrew Newton, Zhuo Li
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Patent number: 10675927Abstract: A system is disclosed. The system includes a processing station for processing at least one of a tire and a wheel prior to joining the tire and the wheel for forming a tire-wheel assembly. The processing station includes one of a tire lubricating sub-station and a wheel lubricating sub-station. A lubrication conditioning system is fluidly-coupled to the processing station. The lubrication conditioning system includes: a lubricant reservoir, a lubricant temperature modifier arranged at least proximate to the lubricant reservoir, a lubricant temperature sensor arranged within a cavity formed by the lubricant reservoir and a controller communicatively-coupled to both of the lubricant temperature modifier and the lubricant temperature sensor.Type: GrantFiled: November 1, 2017Date of Patent: June 9, 2020Assignee: Android Industries LLCInventors: Donald Graham Straitiff, Barry Allan Clark, Lawrence J. Lawson, Joshua James Hicks, Robert Reece, David Henry Larson
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Patent number: 10598560Abstract: A balancing device, a uniformity device and an apparatus including the balancing device and the uniformity device are disclosed. Each of the balancing device and the uniformity device includes at least one multi-axis transducer. Methods are also disclosed.Type: GrantFiled: August 29, 2016Date of Patent: March 24, 2020Assignee: Android Industries LLCInventors: Lawrence J. Lawson, Robert Reece, Barry Allan Clark, Donald Graham Straitiff
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Patent number: 10402522Abstract: Aspects of the present disclosure address improved systems and methods for region-aware clustering in integrated circuit (IC) designs. Consistent with some embodiments, the method may include identifying a clustering region for each clock driver included in an IC design based on locations of sinks and blockages, and timing constraints. The CTS tool finds representative locations for each clock driver within their respective clustering regions. Given the representative location for each clock driver, the CTS tool applies point-based clustering to the clock drivers of the IC design to obtain one or more clusters.Type: GrantFiled: August 31, 2017Date of Patent: September 3, 2019Assignee: Cadence Design Systems, Inc.Inventors: Natarajan Viswanathan, Charles Jay Alpert, Thomas Andrew Newton, William Robert Reece
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Patent number: 10402533Abstract: Systems, methods, media, and other such embodiments are described for placement of cells in a multi-level routing tree, where placement of a mid-level parent node between a grandparent node and a set of child nodes is not set. One embodiment involves generating a first routing subregion between a first set of child nodes associated with a first grandparent node and a first connecting route from the first routing subregion to the first grandparent node, which together are set as a first routing region comprising the first routing subregion and the first connecting route. Sampling points are selected along the first routing region, and for each sampling point a set of operating values associated with the sampling point is calculated. A position for the parent node is selected based on the operating values for the sampling points.Type: GrantFiled: August 30, 2017Date of Patent: September 3, 2019Assignee: Cadence Design Systems, Inc.Inventors: William Robert Reece, Yi-Xiao Ding, Thomas Andrew Newton, Charles Jay Alpert, Zhuo Li
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Patent number: 10359333Abstract: A balancing device, a uniformity device and an apparatus including the balancing device and the uniformity device are disclosed. Each of the balancing device and the uniformity device includes at least one multi-axis transducer. Methods are also disclosed.Type: GrantFiled: August 16, 2016Date of Patent: July 23, 2019Assignee: Android Industries LLCInventors: Lawrence J. Lawson, Robert Reece, Barry Allan Clark, Donald Graham Straitiff
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Patent number: 10318693Abstract: Aspects of the present disclosure address improved systems and methods for designing an integrated circuit design clock tree structure with scaled-load balanced clusters. Consistent with some embodiments, the system may include a clock tree synthesis (CTS) tool configured to recursively group pins to form a set of clusters that are balanced according to a scaled load. During the recursive grouping, the CTS tool scales actual loads of clusters in accordance with a scaling factor that is based on the radius of the cluster. In this way, the scaling factor penalizes large cluster spans during recursive clustering, thereby producing a clock tree structure that meets design rule constraints.Type: GrantFiled: August 29, 2017Date of Patent: June 11, 2019Assignee: Cadence Design Systems, Inc.Inventors: Natarajan Viswanathan, Zhuo Li, Charles Jay Alpert, William Robert Reece, Thomas Andrew Newton
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Patent number: 10198551Abstract: Systems, methods, media, and other such embodiments described herein relate to trimming cell lists prior to generation of a routing tree for a circuit design. One embodiment involves accessing a cell library including cell data and a cell list for a plurality of cells. Specialized delay cells are removed from the cell list, and remaining cells are analyzed to identify a set of cell characteristics. Cells are then trimmed from the cell list based on comparisons between the cell characteristics of the remaining cells. If certain cells are sufficiently similar, secondary characteristics can be used to further trim the cell list. The trimmed cell list can then be used to generate a routing tree for the circuit design according to associated design criteria.Type: GrantFiled: August 18, 2017Date of Patent: February 5, 2019Assignee: Cadence Design Systems, Inc.Inventors: Amin Farshidi, Zhuo Li, Charles Jay Alpert, William Robert Reece
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Patent number: 10143983Abstract: A system includes a processing station and a lubricant supply system in fluid communication with the processing station. The processing station is operable to process at least one of a tire and a wheel prior to joining the tire and the wheel to form a tire-wheel assembly. The processing station includes at least one of a tire lubricating sub-station or a wheel lubricating sub-station. The lubricant supply system includes a storage container configured to store a lubricant and a whipping device received by the lubricant container and operable to whip or blend the lubricant from a semi-solid state to a whipped state. The lubricant supply system also includes a pump operable to pump the lubricant in the whipped state out of the storage container.Type: GrantFiled: February 17, 2016Date of Patent: December 4, 2018Assignee: Android Industries LLCInventors: Donald Graham Straitiff, Barry Allan Clark, Lawrence J. Lawson, Joshua James Hicks, Robert Reece, David Henry Larson
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Patent number: 10065463Abstract: An inflation work station for inflating a tire-wheel assembly including a tire mounted to a wheel is disclosed. The inflation work station includes at least one inflation probe including a female portion and a male portion. The male portion is arrangeable with respect to the female portion in one of a non-mated orientation such that the at least one inflation probe is arranged in an offline orientation and a mated orientation such that the at least one inflation probe is arranged in an online orientation. The inflation work station further includes a working device including a controller, at least one movement actuator connected to the controller and the at least one inflation probe. The at least one movement actuator imparts movement to the male portion to result in the online/offline orientation of the at least one inflation probe. The inflation work station includes at least one valve connected to the controller and the at least one inflation probe.Type: GrantFiled: July 6, 2016Date of Patent: September 4, 2018Assignee: Android Industries LLCInventors: Lawrence J. Lawson, Robert Reece
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Patent number: 10048157Abstract: A balancing device, a uniformity device and an apparatus including the balancing device and the uniformity device are disclosed. Each of the balancing device and the uniformity device includes at least one multi-axis transducer. Methods are also disclosed.Type: GrantFiled: July 10, 2014Date of Patent: August 14, 2018Assignee: Android Industries LLCInventors: Lawrence J. Lawson, Robert Reece, Barry A. Clark, Donald G. Straitiff
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Publication number: 20180050572Abstract: A system is disclosed. The system includes a processing station for processing at least one of a tire and a wheel prior to joining the tire and the wheel for forming a tire-wheel assembly. The processing station includes one of a tire lubricating sub-station and a wheel lubricating sub-station. A lubrication conditioning system is fluidly-coupled to the processing station. The lubrication conditioning system includes: a lubricant reservoir, a lubricant temperature modifier arranged at least proximate to the lubricant reservoir, a lubricant temperature sensor arranged within a cavity formed by the lubricant reservoir and a controller communicatively-coupled to both of the lubricant temperature modifier and the lubricant temperature sensor.Type: ApplicationFiled: November 1, 2017Publication date: February 22, 2018Inventors: Donald Graham Straitiff, Barry Allan Clark, Lawrence J. Lawson, Joshua James Hicks, Robert Reece, David Henry Larson
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Patent number: 9821615Abstract: A system is disclosed. The system includes a processing station for processing at least one of a tire and a wheel prior to joining the tire and the wheel for forming a tire-wheel assembly. The processing station includes one of a tire lubricating sub-station and a wheel lubricating sub-station. A lubrication conditioning system is fluidly-coupled to the processing station. The lubrication conditioning system includes: a lubricant reservoir, a lubricant temperature modifier arranged at least proximate to the lubricant reservoir, a lubricant temperature sensor arranged within a cavity formed by the lubricant reservoir and a controller communicatively-coupled to both of the lubricant temperature modifier and the lubricant temperature sensor.Type: GrantFiled: June 5, 2014Date of Patent: November 21, 2017Assignee: Android Industries LLCInventors: Donald G. Straitiff, Barry A. Clark, Lawrence J. Lawson, Joshua J. Hicks, Robert Reece, David H. Larson
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Patent number: 9751368Abstract: An apparatus for processing a tire and a wheel for forming a tire wheel assembly is disclosed. The apparatus includes a tire support member including a first tire support member, a second tire support member and a third tire support member. Each of the first, second and third tire support members include an upper surface and a lower surface. The apparatus includes a plurality of tire engaging devices including a first tire tread engaging post and a second tire tread engaging post. A method for processing a tire and a wheel for forming a tire wheel assembly is also disclosed.Type: GrantFiled: December 18, 2014Date of Patent: September 5, 2017Assignee: Android Industries LLCInventors: Lawrence J. Lawson, Robert Reece, Joshua J. Hicks, Barry A. Clark