Patents by Inventor Robert B. Haig

Robert B. Haig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data bus
    Patent number: 7646215
    Abstract: A combined input and termination circuit comprises a fixed portion of impedance and a programmable portion of impedance. The fixed portion is able to be fixed in a driver mode and a termination mode. The programmable portion is able to be configured to have a desired impedance in a driver mode or a termination mode while maintaining minimum associated capacitance.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: January 12, 2010
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Robert B. Haig, Patrick T. Chuang, Chih-Chiang Tseng, Kookhwan Kwon
  • Efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data bus
    Publication number: 20090237109
    Abstract: A combined input and termination circuit comprises a fixed portion of impedance and a programmable portion of impedance. The fixed portion is able to be fixed in a driver mode and a termination mode. The programmable portion is able to be configured to have a desired impedance in a driver mode or a termination mode while maintaining minimum associated capacitance.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Inventors: Robert B. Haig, Patrick T. Chuang, Chih-Chiang Tseng, Kookhwan Kwon
  • Method and system for determining memory refresh rate
    Patent number: 5379400
    Abstract: A computer system is provided wherein dynamic random access memory within the system is refreshed by executing one of two refresh cycles. The computer system includes system dynamic random access memory and optional expansion dynamic random access memory which may be installed on an input/output bus. Circuitry is provided for detecting if at least one input/output device having dynamic random access memory incorporated therein is installed on the input/output bus. A refresh control unit incorporates control logic for alternatively executing (i) a first refresh cycle if no input/output device is connected to the input/output bus or (ii) a second refresh cycle if at least one of the input/output devices is connected to the input/output bus. The first refresh cycle is a faster than the second refresh cycle.
    Type: Grant
    Filed: August 7, 1992
    Date of Patent: January 3, 1995
    Assignee: International Business Machines Corp.
    Inventors: Edmond H. Barakat, Robert B. Haig
  • Data processing system including corrupt flash ROM recovery
    Patent number: 5327531
    Abstract: A personal computer is provided with primary and secondary non-volatile storage devices for initializing the system when power is turned on. The primary device is a flash RAM. A flash ROM memory controller include means to detect when the flash ROM becomes corrupted and to switch over to the secondary device for initialization allowing the flash ROM to be later reprogrammed.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: July 5, 1994
    Assignee: International Business Machines Corp.
    Inventors: Richard Bealkowski, Dhruvkumar M. Desai, Robert B. Haig, Dennis L. Moeller, Essy Tashakori