Abstract: A time measurement system that uses two signals generated by direct digital synthesis. The generated signals have the same frequency but different phase. One signal is used to identify the start of the measurement interval and the other signal is used to identify a measurement window in which a signal indicating the end of the measured interval might be detected. The time measurement system is used as part of a time domain reflectometry (TDR) system. An incident pulse is synchronized to the first signal and launched down on a line. In the measurement window, the signal on the line is compared to a threshold value to determine whether the pulse has been reflected and traveled back to the source. By iteratively repeating the measurement with a different measurement window, the time of arrival of the reflected pulse can be determined. This time domain reflectometry approach is incorporated into automatic test equipment for testing semiconductor devices and is used to calibrate the test equipment.

Abstract: A clock system is disclosed for distributing and generating a digital clock signal for a plurality of electronic assemblies. The clock system includes a remote fixed-frequency clock for generating a first clock signal of a first frequency and a plurality of local clock modules. The local clock modules are respectively disposed on the plurality of electronic assemblies and each include synthesizer circuitry for creating a variable clock signal of a different frequency than the first frequency. Fanout circuitry is coupled between the remote fixed frequency clock and the plurality of local clock modules to distribute the first clock signal.

Abstract: A clock system is disclosed for distributing and generating a digital clock signal for a plurality of electronic assemblies. The clock system includes a remote fixed-frequency clock for generating a first clock signal of a first frequency and a plurality of local clock modules. The local clock modules are respectively disposed on the plurality of electronic assemblies and each include synthesizer circuitry for creating a variable clock signal of a different frequency than the first frequency. Fanout circuitry is coupled between the remote fixed frequency clock and the plurality of local clock modules to distribute the first clock signal.

Abstract: An analog clock apparatus is disclosed including a digital clock source for producing a digital waveform of a predetermined frequency and a direct-digital-synthesizer. The synthesizer has an input to receive the digital waveform and is operative to generate a resultant analog waveform. Prediction logic is coupled to the digital clock source and the synthesizer for determining the relative phase relationships between the digital waveform and the analog waveform. The prediction logic is responsive to a prediction clock having a clock frequency approximating that of said digital clock source.

Abstract: An apparatus and method for initializing a shared-memory, multinode multiprocessor computer system. The nodes in the multiprocessor computer system separately and independently run standard PC-based BIOS routines in parallel for initialization of the nodes. These BIOS routines set addresses of hardware components on each node as though the nodes are in a single-node environment. After completion of BIOS, the addresses of the hardware components are reprogrammed to conform with the multinode environment. A master processor then takes control to boot the operating system on the multinode environment.