Abstract: Nano-scale junctions, wires, and junction arrays are created by using a focused high-energy ion beam to direct-write insulating or poorly conducting barriers into thin films of materials that are sensitive to disorder, including superconductors, ferromagnetic materials and semiconductors.

Abstract: A method for measuring conductance of a material real-time during etching/milling includes providing a fixture having a socket for receiving the material. The socket is attached to a printed circuit board (PCB) mounted on one side of a plate that has at least one opening for providing ion beam access to the material sample. Conductive probes extend from the other side of the PCB to contact and span a target area of the material. A measurement circuit in electrical communication with the probes measures the voltage produced when a current is applied across the material sample to measure changes in electrical properties of the sample over time.

Abstract: A device and method for converting magnetic flux to voltage uses a linear Fraunhofer pattern of a 1D array of long Josephson junctions. The 1D array of Josephson junctions may include from 1 to 109 junctions formed in a planar geometry with a bridge width within the range of 4-10 ?m.

Abstract: Nano-scale junctions, wires, and junction arrays are created by using a focused high-energy ion beam to direct-write insulating or poorly conducting barriers into thin films of materials that are sensitive to disorder, including superconductors, ferromagnetic materials and semiconductors.

Abstract: A device and method for converting magnetic flux to voltage uses a linear Fraunhofer pattern of a 1D array of long Josephson junctions. The 1D array of Josephson junctions may include from 1 to 109 junctions formed in a planar geometry with a bridge width within the range of 4-10 ?m.

Abstract: Nano-scale junctions, wires, and junction arrays are created by using a focused high-energy ion beam to direct-write insulating or poorly conducting barriers into thin films of materials that are sensitive to disorder, including superconductors, ferromagnetic materials and semiconductors.

Abstract: A device and method for converting magnetic flux to voltage uses a Fraunhofer pattern of a 1D array of long Josephson junctions. The 1D array of Josephson junctions may include from 1 to 109 junctions formed in a planar geometry with a bridge width within the range of 4-10 ?m.

Abstract: A method for measuring conductance of a material real-time during etching/milling includes providing a fixture having a socket for receiving the material. The socket is attached to a printed circuit board (PCB) mounted on one side of a plate that has at least one opening for providing ion beam access to the material sample. Conductive probes extend from the other side of the PCB to contact and span a target area of the material. A measurement circuit in electrical communication with the probes measures the voltage produced when a current is applied across the material sample to measure changes in electrical properties of the sample over time.

Abstract: A process for forming trenches in a target material includes forming a masking layer onto the target material, where the masking layer comprises a material having high selectivity to a plasma etch gas adapted for etching the target material. A pattern is formed in the masking layer to expose portions of the target material and the sample is placed on an angle mount at a pre-determined angle relative to a cathode of a reactive ion etcher so that the target material is within a plasma dark space of the plasma etch gas. Ballistic ions within the plasma dark space form a trench structure within the target material. The process may further include repeating the steps of positioning the sample and etching the exposed portions of the target material with the substrate at a different angle to define a triangular structure.

Abstract: Nano-scale junctions, wires, and junction arrays are created by using a focused high-energy ion beam to direct-write insulating or poorly conducting barriers into thin films of materials that are sensitive to disorder, including superconductors, ferromagnetic materials and semiconductors.

Abstract: A device and method for converting magnetic flux to voltage uses a Fraunhofer pattern of a 1D array of long Josephson junctions. The 1D array of Josephson junctions may include from 1 to 109 junctions formed in a planar geometry with a bridge width within the range of 4-10 ?m.

Abstract: A process for forming trenches in a target material includes forming a masking layer onto the target material, where the masking layer comprises a material having high selectivity to a plasma etch gas adapted for etching the target material. A pattern is formed in the masking layer to expose portions of the target material and the sample is placed on an angle mount at a pre-determined angle relative to a cathode of a reactive ion etcher so that the target material is within a plasma dark space of the plasma etch gas. Ballistic ions within the plasma dark space form a trench structure within the target material. The process may further include repeating the steps of positioning the sample and etching the exposed portions of the target material with the substrate at a dif ferent angle to define a triangular structure.

Abstract: A single crystal silicon film nanostructure capable of optical emission is aterally disposed on an insulating transparent substrate of sapphire. By laterally disposing the nanostructure, adequate support for the structure is provided, and the option of fabricating efficient electrical contact structures to the nanostructure is made possible. The method of the invention begins with the deposition of ultrathin layers of silicon on the substrate. A Solid Phase Epitaxy improvement process is then used to remove crystalline defects formed during the deposition. The silicon is then annealed and thinned using thermal oxidation steps to reduce its thickness to be on the order of five nanometers in height. The width and length of the nanostructure are defined by lithography. The nanometer dimensioned silicon is then spin-coated with a resist with width and length definition in the resist being performed by way of electron beam exposure.

Abstract: A single crystal silicon film nanostructure capable of optical emission is laterally disposed on an insulating transparent substrate of sapphire. By laterally disposing the nanostructure, adequate support for the structure is provided, and the option of fabricating efficient electrical contact structures to the nanostructure is made possible. The method of the invention begins with the deposition of ultrathin layers of silicon on the substrate. A Solid Phase Epitaxy improvement process is then used to remove crystalline defects formed during the deposition. The silicon is then annealed and thinned using thermal oxidation steps to reduce its thickness to be on the order of five nanometers in height. The width and length of the nanostructure are defined by lithography. The nanometer dimensioned silicon is then spin-coated with a resist with width and length definition in the resist being performed by way of electron beam exposure.

Abstract: Disclosed is an article that comprises a superconductor-insulator (s-i) layer structure. The superconductor material has nominal composition Ba.sub.1-x M.sub.x BiO.sub.3-y (M is K, Rb, or K and Rb, 0.35<x.ltorsim.0.5, 0<y.ltorsim.0.25). In some preferred embodiments the insulator is a Ba- and Bi containing oxide, exemplarily BaBi.sub.2 O.sub.4, Ba.sub.1-x M.sub.x BiO.sub.3 (0.ltoreq.x<0.35), or Ba.sub.1-x Bi.sub.1+x O.sub.3 (0.ltoreq.x.ltorsim.0.5). In other embodiments the insulator is an insulating oxide with the NaCl structure (e.g., Mg.sub.1-x Ca.sub.x O), an insulating perovskite (e.g., BaZrO.sub.3 ), an insulator with the K.sub.2 NiF.sub.4 structure (e.g., Ba.sub.2 PbO.sub.4), an insulating fluoride with the BaF.sub.2 structure (e.g., Ba.sub.1-x Sr.sub.x F.sub.2), or an insulating fluoride with the NaCl structure (e.g., LiF). Disclosed are also advantageous methods of making an article according to the invention.

Abstract: Disclosed is a technique, termed "mesotaxy", for producing a heteroepitaxial structure comprising a layer of single crystal second material embedded in, and epitaxial with, a single crystal first material matrix. Mesotaxy comprises implantation of at least one chemical species (e.g., Co, Ni, Cr, Y or Mg) into a single crystal body (typically a semiconductor, e.g., Si or Ge) such that a buried layer rich in the implanted species is formed, and heat treating the implanted body such that a buried stoichiometric compound layer (e.g., CoSi.sub.2) is formed. Exemplarily, 3.multidot.10.sup.17 /cm.sup.2 200 keV Co ions are implanted into (100) Si nominally at 350.degree. C., followed by a heat treatment that consists of 1 hour at 600.degree. C. and 30 minutes at 1000.degree. C. The resulting buried CoSi.sub.2 layer is epitaxial with the Si matrix, has high conductivity and is of good crystalline quality. The Si overlayer is of device quality.

Abstract: A metal-semiconductor variable resistance temperature or infrared energy measuring device is described, along with a method for making it. The device may be made as a thin film, and typically operates over the range of at least 1 degree K to 300 degrees K. The device typically has an approximately 1/T temperature dependence of resistance. In one embodiment, gold is used as the metal, and germanium the semiconductor. The metal subsists as metallic or intermetallic globules dispersed in a semiconductor matrix, and may be formed by heating a metastable metal-semiconductor alloy until the metal precipitates out as described.