Patents by Inventor Robert Charbonneau
Robert Charbonneau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240023232Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: ApplicationFiled: September 27, 2023Publication date: January 18, 2024Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 11805595Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: GrantFiled: July 25, 2022Date of Patent: October 31, 2023Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 11765813Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: GrantFiled: June 28, 2021Date of Patent: September 19, 2023Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 11553589Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: GrantFiled: March 31, 2021Date of Patent: January 10, 2023Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20220361320Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20210329775Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: ApplicationFiled: June 28, 2021Publication date: October 21, 2021Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 11096270Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: GrantFiled: April 1, 2020Date of Patent: August 17, 2021Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20210219420Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: ApplicationFiled: March 31, 2021Publication date: July 15, 2021Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 10993314Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: GrantFiled: October 29, 2019Date of Patent: April 27, 2021Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20200229299Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: ApplicationFiled: April 1, 2020Publication date: July 16, 2020Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 10638599Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: GrantFiled: December 18, 2018Date of Patent: April 28, 2020Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20200068705Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: ApplicationFiled: October 29, 2019Publication date: February 27, 2020Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 10485097Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: GrantFiled: December 10, 2018Date of Patent: November 19, 2019Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20190150273Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: ApplicationFiled: December 18, 2018Publication date: May 16, 2019Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20190110359Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: ApplicationFiled: December 10, 2018Publication date: April 11, 2019Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 10201074Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: GrantFiled: November 8, 2017Date of Patent: February 5, 2019Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 10187972Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: GrantFiled: March 7, 2017Date of Patent: January 22, 2019Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20180070439Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: ApplicationFiled: November 8, 2017Publication date: March 8, 2018Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Publication number: 20170265296Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.Type: ApplicationFiled: March 7, 2017Publication date: September 14, 2017Applicant: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 8911205Abstract: A knife edge seal assembly includes at least one knife edge and at least one honeycomb ring seal. The at least one knife edge has material removed to a first knife edge radial height and the least one honeycomb ring seal has material removed to a finished radial thickness for sealable engagement with the at least one knife edge. The finished radial thickness of the replacement honeycomb ring seal establishes a first radial gap between an inner annular surface of the replacement honeycomb ring seal and the knife edge before the knife edge seal assembly begins rotating in the gas turbine.Type: GrantFiled: October 12, 2011Date of Patent: December 16, 2014Assignee: United Technologies CorporationInventors: William M. Rose, Robert A. Charbonneau