Abstract: In some examples, a system comprises a nuclear event detector (NED) to issue a nuclear event status signal, a primary power supply to issue a power status signal, a backup power supply, a non-volatile storage, and a processor coupled to the non-volatile storage and the NED and switchably coupled to the primary and backup power supplies. The processor is to store a state of the processor to the non-volatile storage based on the nuclear event status signal, and the processor is to selectively receive power from either the primary power supply or the backup power supply based on the nuclear event status signal and the power status signal.

Abstract: In some examples, a system comprises a nuclear event detector (NED) to issue a nuclear event status signal, a primary power supply to issue a power status signal, a backup power supply, a non-volatile storage, and a processor coupled to the non-volatile storage and the NED and switchably coupled to the primary and backup power supplies. The processor is to store a state of the processor to the non-volatile storage based on the nuclear event status signal, and the processor is to selectively receive power from either the primary power supply or the backup power supply based on the nuclear event status signal and the power status signal.

Abstract: Integrated circuits and methods for deactivating user circuit operation with one or more wide channel sensing transistors biased to an on condition for exposure to total ionizing dose and then to an off condition for measurement and comparison of a leakage current or threshold voltage parameter to a predetermined reference, and a deactivation circuit selectively disables operation of the user circuit if the sensed parameter is greater than or equal to the reference.

Abstract: Integrated circuits as well as fabrication and operating methods are presented in which user circuitry of the IC is selectively disabled in response to detection of a single event latchup condition in a sensing circuit that is prone to latchup in response to ionic radiation at a specific linear energy transfer level.

Abstract: A method includes testing to failure a plurality of semiconductor test structures, measuring a parameter of each semiconductor test structure after experiencing a failure, and generating a cumulative probability distribution function (CPDF) of cumulative probability versus the measured parameter after failure for the plurality of semiconductor test structures. The method further includes performing simulations for a circuit having an area using a model of a transistor that mimics the failure to determine a parameter threshold value that defines a minimum acceptable performance level of the circuit, determining a cumulative probability value from the CPDF that a transistor will not have the parameter at a level below the parameter threshold value, adjusting a value of the area of the circuit based on the cumulative probability value, and computing a first reliability value based on the adjusted area value.

Abstract: A method includes testing to failure a plurality of semiconductor test structures, measuring a parameter of each semiconductor test structure after experiencing a failure, and generating a cumulative probability distribution function (CPDF) of cumulative probability versus the measured parameter after failure for the plurality of semiconductor test structures. The method further includes performing simulations for a circuit having an area using a model of a transistor that mimics the failure to determine a parameter threshold value that defines a minimum acceptable performance level of the circuit, determining a cumulative probability value from the CPDF that a transistor will not have the parameter at a level below the parameter threshold value, adjusting a value of the area of the circuit based on the cumulative probability value, and computing a first reliability value based on the adjusted area value.

Abstract: Integrated circuits as well as fabrication and operating methods are presented in which user circuitry of the IC is selectively disabled in response to detection of a single event latchup condition in a sensing circuit that is prone to latchup in response to ionic radiation at a specific linear energy transfer level.

Abstract: Integrated circuits and methods for deactivating user circuit operation with one or more wide channel sensing transistors biased to an on condition for exposure to total ionizing dose and then to an off condition for measurement and comparison of a leakage current or threshold voltage parameter to a predetermined reference, and a deactivation circuit selectively disables operation of the user circuit if the sensed parameter is greater than or equal to the reference.

Abstract: The present invention pertains to radiation sources that mimic radiation environment(s) encountered by packaged semiconductor devices. The sources are suitable for use in test systems operative to test for soft error and/or failure rates in devices sensitive to such radiation. The radiation is highly active to exacerbate soft error rates and thereby accelerate testing and reduce test times. The sources are also relatively uniformly distributed within a medium to simulate the direction(s) and energy spectra of radiation that would actually be encountered by semiconductor devices in device operation.

Abstract: The present invention pertains to radiation sources that mimic radiation environment(s) encountered by packaged semiconductor devices. The sources are suitable for use in test systems operative to test for soft error and/or failure rates in devices sensitive to such radiation. The radiation is highly active to exacerbate soft error rates and thereby accelerate testing and reduce test times. The sources are also relatively uniformly distributed within a medium to simulate the direction(s) and energy spectra of radiation that would actually be encountered by semiconductor devices in device operation.

Abstract: The present invention pertains to radiation sources that mimic radiation environment(s) encountered by packaged semiconductor devices. The sources are suitable for use in test systems operative to test for soft error and/or failure rates in devices sensitive to such radiation. The radiation is highly active to exacerbate soft error rates and thereby accelerate testing and reduce test times. The sources are also relatively uniformly distributed within a medium to simulate the direction(s) and energy spectra of radiation that would actually be encountered by semiconductor devices in device operation.

Abstract: A system and associated methodology are disclosed for characterizing soft error or failure rates of electronic circuit elements, where the elements are suitable for use as non-memory peripheral logic in semiconductor memory devices, and where the probability of such soft error or failure rates increases as charge sensitive interconnections or nodes of the elements are exposed to radiation, and as scaling continues and voltages and capacitances are thereby reduced.